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I am currently developing a subset of the 6502 in LogiSim. One of my main resources is Hanson's Block Diagram.

Currently I am developing opcodes for the processor, and my current task is the instruction BPL, where the processor checks the negative flag, and if it is positive goes to a specified address.

My first thought was that the processor puts the status register into the ALU and has the other argument as 10000000, but the ALU compares 8 bit numbers, so I am not sure how it would compare just a single bit of the status register. How does the 6502 check the negative flag internally?

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    I don't know specifically for the 6502, but generally speaking the flags in a processor are implemented as a single latch, so to control something based on them you'd just wire the output directly up to whatever needs it. No ALU usage required. – Jules Jan 18 '18 at 14:40
  • @Jules, I imagine you meant each flag is implemented as a single flip-flop, not all the flags in that single flip-flop, as your comment reads :-) – TonyM Jan 18 '18 at 16:34
  • The flag bit is most likely wired directly to the condition checker. – user253751 Nov 6 '18 at 21:52

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