I have run into a condensed-matter-physics research paper published in 1973, from the Physics Department of Rutgers University, NJ, USA. The paper provides some numerical computations of condensed-matter physics, and I would like to had a rough estimate of what was the computer power used to produce these results at that time, converted in number of Mhz for a single CPU of a today's computer.

I do know that the answer may depend on a variety of unknown factors, but I was wondering whether you could just give me your best guess.


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    As someone who was at university in the '70s, it is not just the power of the machine itself that you had to consider, you were only allowed to use a finite amount of processing time per day.
    – Chenmunka
    Commented Apr 20, 2018 at 11:30
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    "University computer in the 70s" could mean anything from the above-mentioned CDC computer, to an IBM or DEC mainfraime, to a DEC or CDC minicomputer, to a Hewlett-Packard desktop calculator.* Commented Apr 20, 2018 at 15:57
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    *Hewlett Packard marketed their range of desktop laboratory instrumentation computers as "calculators" because they knew it was much easier for a researcher to get approval to buy a "calculator" that cost a few thousand dollars than it would be to get approval for a "computer" that cost the same. Commented Apr 20, 2018 at 16:01
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    MHz isn't a very good speed metric - a 1 MHz Pentium III is considerably slower in processing power than a latest-generation Core i7 running at the same clock rate. Commented Apr 20, 2018 at 19:16
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    It might help if you could identify the computer used. There is a research paper that outlines thistory of Academic computing at Rutgers for your time frame located here. The physics department had at least one DEC PDP-10 and a Xerox Sigma 7. Maybe the paper will give you a pointer to one of these two computers. Commented Dec 31, 2018 at 11:39

5 Answers 5


As there is a large variation in computers, the operations they can perform and how they do it, a simple answer can only be done with more detailed information what you're looking for. Keep in mind, back then it wasn't all x86. Computers where much more 'colourful'.

As a guideline the 1969 introduced CDC 7600 could be useful. It had a maximum floating point thruput of ~36 MFLOPS (Million Floating Point Operations Per Second). In comparison, thats about the same as 1000 Intel 8087 of 1980 - or similar to a Pentium MMX' FPU of 1994 (P54C).

Before that the crown did go to the CDC 6600 with 3 MFLOPS peak - like 100 8087 or a 100 MHz 80486-DX4 of 1994 (*1).

A 1972 ILLIAC-IV peaked at 50 MFLOP, and a 1974 STAR-100 at 100 MFLOP (Similar TI's ASC). Thats in the Pentium II 200-300 range of 1997. Finally in 1975 the Cray-1 offered up to 160 MFLOPS.

So these machines are the upper end of what was available in the time frame mentioned.

*1 - So super computer wise switching in 1970 from a CDC 6600 to a 7600 was like choosing in 1994 between a top end 486 and a medium range Pentium MMX :))

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    As a point of reference, at around 1975, Imperial College, London had, IIRC, a CDC 6600 and a Cyber 173 (the latter, according to this Wiki page being a successor to the CDC 7600 series, using ICs and semiconductor memory instead of discrete components and core memory). I was at school at the time, and this was my first contact with a computer: a teacher used to take hand-punched cards of Fortran and run them through Imperial's machines each evening and give you the printouts in the morning!
    – TripeHound
    Commented Apr 20, 2018 at 12:43
  • Very similar to my first experience with a computer. The same year but, in my case, it was an NCR in a nearby tech college. A secretary typed our hand written programs onto punched tape and transmitted it through a modem. Her husband worked at the college. He would run the programs and bring the print out home, She would bring the print out to us the next day.
    – badjohn
    Commented Apr 21, 2018 at 7:28
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    A friend was at Imperial, but a bit later when they had a Cray : we worked out that one second on the Cray was 4.5 days on one of our Atari ST’s eith 4 meg ram :) :)
    – Solar Mike
    Commented Apr 22, 2018 at 21:01
  • "back then it wassnt all x86" (being about the 1970s) Well, seeing that production of the 8086 only started in 1978, if Wikipedia is to be trusted in the matter...
    – user
    Commented Jun 21, 2018 at 12:08
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    +1 for setting a reasonable upper bound. We cannot know what computer was used for the research paper, but we can know what was the most powerful computer that could have been used. This is a very useful answer. Commented Dec 31, 2018 at 17:22

In that time frame, I was working with a Univac 1108. In 1968 you could pick up a 1.3 MHz CPU with half a megabyte of RAM and 100 megabyte hard drive for a mere US$1.6 million.

There's some fascinating information on this site

Univac marketing material.


The physics department of Rutgers had a DEC PDP-10 in the time frame that the paper would have been written. You can check out the listing for Rutgers here. According to this listing it was a KI10 processor, which ran at a clock speed of 9.1Mhz. You can check that out here.

The Rutgers PDP-10 was running TOPS-10. While this would have been intended primarily for interactive timeshared use, TOPS-10 had a good batch subsystem, which could make use of machine cycles that would otherwise be wasted. The kind of number crunching needed for the paper would have been well suited to running under batch, perhaps with some kind of checkpointing feature so that it could do a little of the work each night.

As other answers have pointed out the measure of the processor in Megaflops is perhaps more to the point than Mhz, which you asked for. The Wikipedia article for the PDP-10 rates the KL processor at about 1 Megaflop, and the KL was approximately twice as fast as the KI.

I can't prove that the computations you asked about were actually done on the KI at Rutgers, but it's a pretty good chance.


In terms of a modern CPU:

The 36 double-precision MFLOPs that @Raffzahn mentions for a CDC 7600 (1969) is about equivalent to a single-core 2.25 MHz Haswell or Skylake (not GHz). i.e. less than one thousandth of a single core of a modern desktop/laptop Intel CPU at 2 to 4 GHz, with theoretical max FP throughput.

Pentium MMX is not a great comparison: its FPU is weak compared to modern x86. It was fully pipelined 3c latency / 1c throughput fmul / fadd / etc. (https://agner.org/optimize/ instruction tables), but in-order execution plus the x87 stack register design made it hard for compilers to take advantage, and the x87 stack registers often required extra fxch instructions which hurt practical throughput. Modern x86 has SIMD, and even scalar FP is done with SSE2 using a flat set of registers.

Theoretical max FP throughput on Pentium / Pentium MMX is not bad at 1 FLOP per clock, but @Raffzahn is using much more conservative numbers which puts a 150 to ~200MHz(?) Pentium at 36 MFLOPs for some practical benchmark.

Skylake's absolute max FP throughput is 16 DP FLOP / clock, using AVX and FMA. (2x 256-bit SIMD vector FMAs per clock, counting an FMA as two FP ops: a multiply and add). Or 32 single-precision FLOP / clock, because twice as many elements per SIMD vector.

It's hard to take advantage of this much FP throughput without bottlenecking on the front-end or load/store throughput, but a well-tuned SIMD matmul can come pretty close. Most other code can't come close; maybe a factor of 10 lower FLOPs would still be fairly reasonable for some code, especially if it's not compiled to use FMA instructions.

(This is without considering AVX512, which on CPUs with two 512-bit FMA units doubles the theoretical max FLOP / clock throughput.)

I don't know how hard it was to write code for a CDC that actually bottlenecked on its peak FP throughput, rather than memory, instruction-throughput, or something else.

I'd guess that modern x86, especially Intel, has a lot more raw computational throughput available relative to other system bottlenecks, so it's harder to get close to theoretical max throughput in "normal" code. (modern AMD has about half the raw FMA throughput per core per clock vs. Intel). FP computation throughput has grown even faster than most other throughput resources, comparing a Pentium MMX to a modern Haswell/Skylake for example.

But still, I think we can be pretty confident that most FP code compiled for a modern x86 will usually run at least 100 times faster than when compiled for a CDC 7600, even without spending a lot of effort manually vectorizing. Some tuning for cache sizes / contiguous memory access may make a much big difference on modern CPUs than on older ones: good/bad memory access patterns are critically important for CPU cache to hide DRAM latency/bandwidth. The mismatch between CPU and RAM speed has grown a lot since the 1970s, and the round-trip latency is hundreds of core clock cycles these days.

(Compilers have advanced a lot since then, too, in terms of loop optimizations and FP transformations, especially if you compile with -ffast-math to allow the compiler to pretend that (a+b) + c is equivalent to a + (b+c) and similar approximations that FP rounding error makes not quite true.)


In 1974 undergraduate computing at the University of Leeds was based mainly on a KDF9, which was generally considered to be "one third of Atlas" in computing power, which I'd guess put it at about 0.25 MIPS, and which ran a 30-teletype multiple-access timesharing system. This was replaced in 1975/76 by a DEC KI-10 which I'd guess to be somewhere in the 0.5 to 1.0 MIPS range.

  • I think I remember hearing about the KI at the University of Leeds, in connection with Artificial Intelligence. Or maybe it was SIMULA. I forget. Commented Jan 11, 2019 at 12:37
  • I think I recall seeing stuff coming out on the lineprinter to do with Simula. But I was a lowly undergraduate so not really plugged in to what was going on. Maybe it was being ported to the DEC-10. It could have been Rod Burstall's name on the printout; at least, that name just popped into memory.
    – dave
    Commented Jan 12, 2019 at 0:20
  • I came back to correct myself: it was G. Birtwistle who was the DEC-10 Simula guy. Burstall's name goes with the language POP2.
    – dave
    Commented Mar 17, 2019 at 23:53

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