12

Modern graphics cards are essentially miniature supercomputers in their own right, with their own memory and instruction sets, but in the eighties and late seventies, a very common kind of personal computer design had a single memory bank that was updated by the CPU and read by the video chip, with this being the primary method by which the two communicated.

Were these video chips specific to the CPU they were designed to work with, or could they be used with a different one? For example, could you take the ANTIC from the Atari 800, the VIC-II from the Commodore 64 or the video system from the BBC Micro and put them in a Z80 computer? Could you take the Amiga chipset and put it in a 286 machine?

In most ways, I would expect the video chip to be indifferent to the model of CPU; it really just cares about what data gets written to what memory location. The concern I would have would be the bus protocol, which varied with CPU. For example, the 6502 has a predictable on-off cadence to memory access, which makes it easy for a video chip to access memory on alternate cycles, whereas the Z80 is more complicated. But then, even 6502 computers are not quite so simple in practice, as discussed in the answers to Z80 and video chip contending for random access

So could an existing video chip be used as-is with a different CPU, or would it need small changes (design tweaks, extra/different glue logic, performance compromises like in the Amstrad 464 which simplified the Z80 memory access pattern by rounding every instruction up to 4 cycles), or would it need radical design changes?

13
  • 2
    Bus standards like S-100 could support different graphics cards and processors together, but the 80s home computer market ignored it where cost was considered more important than modularity. Commented May 10, 2018 at 9:54
  • 1
    @tofro For proprietary chips, I think the spirit of the question would be "could an engineer who has access to the designs have made them work with a different CPU?".
    – TripeHound
    Commented May 10, 2018 at 12:15
  • 2
    @tofro rebuilding a ZX Spectrum ULAs, out of discrete components, to interface to new Z80 computers was done countless times over in the 1980s. Mostly in the USSR. Commented May 10, 2018 at 13:43
  • 1
    @tofro what's the difference? a few details like number of cycles spent in side borders, and that's about it. How it interfaces with the Z80 and memory subsystems are the same I think. I could be wrong though. Commented May 10, 2018 at 13:58
  • 1
    @Wilson The main difference is not so much technical - The point is if these guys had been in a judicial accessible region, Sinclair would probably have charged the hell out of them. So, cannot is very often a may not. Nobody in the west would, with Sinclair Research still alive, have re-engineered a ZX Spectrum ULA (or a VIC or ANTIC, for that matter), because they would have known they wouldn't last long in that business.
    – tofro
    Commented May 10, 2018 at 14:02

3 Answers 3

13

A lot of the time the answer is "not without difficulty": chips from 6502 machines tend to simply assume they have access to the bus every other cycle; you can't achieve that on a Z80 without stopping the clock every other cycle which would be hugely wasteful since memory accesses are only as-required. The Z80 devices tend to fiddle with the clock and/or use the WAIT line but the former will waste cycles and the latter has no direct 6502 equivalent — the 6502's RDY as used by the C64 for 'bad lines' (those in which the 6502 is stalled) takes effect only on read cycles, not writes.

There are exceptions.

The TMS9918 family breaks the assumption of shared memory. The video chip owns its own RAM. Originally coupled to the TMS9900, it was also deployed in both Z80 machines (such as the Colecovision) and 6502 machines (such as the Creativision).

The 6845 is just an address and sync generator. It doesn't actually access the bus. Therefore it does just enough to be universally useful without binding itself to any particular assumption about how to get at memory. So it occurs in the 6502 BBC Micro, the Z80 Amstrad CPC and the x86 CGA card.

Comparing the BBC and the CPC is perhaps interesting as the latter was originally designed with a 6502 but switched to a Z80 during the period of design.

On a BBC the standard access-in-phase-1 approach is taken to CPU and video interleaving.

On a CPC the WAIT line is strobed for three out of four cycles. Due to the way the Z80 responds to WAIT, that guarantees that it won't access memory for two out of four cycles. Those two are used for video fetch, and one of the remainder is then used by the CPU. In processing times, the net effect is to round each machine cycle up to a multiple of four, which most commonly means adding a cycle to a memory access. So it's not a huge difference. The rule of thumb averaged out is about an 18% speed reduction.

5
  • You may want to quote "not without difficulty," I think the answer would read better this way.
    – phyrfox
    Commented May 10, 2018 at 16:05
  • 1
    @phyrfox I see what you mean on review; I was previously implying that my answer itself was problematic. Which, I guess, it paradoxically was. But now hopefully isn't. Thanks!
    – Tommy
    Commented May 10, 2018 at 16:11
  • 2
    TMS9918A was also paired with the TMS9900 CPU (and the TMS9901 interrupt controller) in the TI-99/4A, a vastly different architecture from the 6502 or Z80. Commented May 10, 2018 at 20:15
  • @JesseC.Slicer corrected! And I now feel suitable shame for having forgotten that VDP's very first platform.
    – Tommy
    Commented May 10, 2018 at 20:46
  • @Tommy No shame at all as classic computing is a very wide field to keep track of. +1 for the awesome info and to bump your rep to 9995, another classic TI CPU. Commented May 10, 2018 at 20:48
5

The way that a (modern-day) CPU and a GPU communicate is (usually) over a PCI bus or some such device. That could be described as a loose connection because there are buffers and bus arbiters and that kind of stuff sitting between the CPU and GPU.

In the retro machines you mention, the CPU and graphics chips communicated over the system bus. This is the same bus which connects RAM, ROM, perhaps a cartridge port or something, and that connection is much tighter. That means that something like a VIC-II or an ANTIC chip will have been designed with the 6502 in mind, and works by cooperating with a 6502 that's connected to it.

If you wanted to attach a VIC-II to a 8086 machine or whatever, I am sure that could be done. There's no magic which says you can't. But you would need to make sure that the VIC-II is communicating over a bus which has the same signals and timings as a 6502. That should be as simple as buffering memory writes from the CPU until the VIC-II is not reading, as then doing the write in that free cycle.

On the other hand, some computers used a chip designed to aid video output, such as the MC6845, instead of a custom ASIC or some such device. This particular chip apparently fits well with various different buses. It was used in the Z80 based ABC800 computer, as well as in the Commodore PET 4000 which as everyone knows used a 6502.

2
  • I say "it should be as simple as". I've never tried it though... Commented May 10, 2018 at 8:39
  • 3
    Of course, the bus protocols of the 65xx series were essentially copied from the bus design of the 6800 (the pin-compatible 6500 was scrapped due to pressure from motorola, but the signals the 6502 used were close enough not to cause any real issue, I believe), so chips designed for operation with the 6502 would have been easy to use with a 6800 (and vice versa of course; the 6845 was originally designed to work with the 6800). Likewise, anything designed for an Intel 8080, 8085 or Z80 should also work with any of the others reasonably easily ... or indeed an 80[1]88.
    – Jules
    Commented May 10, 2018 at 13:23
2

Easy answer is "anything is possible", but of course the real answer is more subtle.

Maybe more interesting would be to ask "were video chips specific to CPUs with contemporary technology". What I mean is that given a modern FPGA, one could probably mate any 1970/80/90 era video chip to any CPU of that era with a little bit of VHDL.

Using contemporary tech is more difficult. Common stuff like MC6845 (and descendants like the MSX chips) or TMS9918 are easy as reading the app notes. ANTIC and VIC-II are pretty simple, so maybe not to hard; some PALs, a wad of TTL, limit the clock speed and a Z-80 could probably make it go. But given contemporary tech, it would be tough to interface an Amiga Denise chip to, say, an 8086; you'd need to create the 8086 equivalent of an Angus ASIC out of discrete logic, PALs or CPLDs (assuming you didn't have access to ASIC fabs and expertise). Similar to mate the Mindset video chips to a 68k. Then the software initialization that these custom chips generally require would need to be reverse engineered.

[edit for clarity]

You must log in to answer this question.

Not the answer you're looking for? Browse other questions tagged .