How was microcode implemented in retro processors such as the Z80 or 8080?
None of these chips (likewise 6800 and 6502) use microcode the same way as it's used today. The decoding isn't as strictly separated from execution logic.
Example 1: 6502
The 6502, for example, has a 'rather' simple structure built from a timing circuit counting instruction cycle and an instruction register, followed by a decoder PLA where instruction plus timing information is transformed into control signals which are fed into the execution units.
The cycle counter starts at 0 and shifts (!) through the maximum 7 states. When an instruction ends, it gets reset to zero for the next one. The 6502 PLA is essentially a one-dimensional decoder transforming the combined instruction plus state into one or more control signals for the execution units. Since the PLA allows partial decoding, one entry can fire on different instructions. For example, all instructions loading the second byte as immediate share one single PLA entry (microcode line). In comparison with textbook microcode engines, this is equivalent to a kind of compressed microcode.
Example 2: Z80
The Z80, in contrast, is based around a more complicated structure. Here the instruction is sent through a (rather) simple decoder. The decoder is built from a PLA. Simple because 8080/Z80 code offer fewer variants (i.e. addressing modes) and is quite regular compared with a 6502. The decoder creates multiple lines for each instruction or instruction group, which are fed into the second stage.
Two counters are set up in parallel. One counting the Memory (or Machine) states (M1..M5), the other Time states (T1..T5) within (*1). With a new instruction the M counter gets reset to 1, with each M state the T counter gets reset.
The second stage of instruction decode is something that is much like another PLA, but built out of single gates (*2). The gates are set up much like a grid with the timing signals (M1..M5 & T1..T5) as horizontal input and the PLA output (instructions/instruction groups) as vertical input. The gate is built along the vertical line and combining its signal with one or more timing signals using AND/NOR logic (*3). The output of these gates again are fed into the discrete logic of the execution units.
There are other differences between these CPUs that can be explained due to the different structure, but less relevant here.
Long Story Short
While both machines are kind of microprogrammed, only the 6502 can somewhat be compared to what today is told about microprogramming.
Was the microcode standard (for example a manual for the processor outlining all possible micro-instructions and the standard combinations to implement documented instructions)? If so, what are some keywords to use to find these manuals online?
Or was the microcode custom written by each manufacturer of the processor (such that for example an ADD instruction might be slightly different between manufacturers)?
Together with the last sentence this sounds as if you believe that there is something like a standard microcode machine and that CPUs are just different microcode files for such.
Sorry to disappoint you, but there ain't no such thing. CPUs are individual designs and microprogram engines are special for each. That's true not only for early microprocessors like above, but even more so today. Creating these mechanics are the core device to enable certain features and/or performance.
Even with a much more 'standard' CPU like an ARM1, the instruction sequencer is a rather special circuit with only 4 states that get not just counted but also repeated or skipped according to a state machine supplied by the microinstructions. Nothing like your textbook micro instruction counter. The microcode ROM itself contains just 42 (?) instruction and are intervened in a rather unique way.
Could the microcode be read and changed by a user?
No. There is not only no use case, but more important, it would bust the transistor count many-fold, not only for early chips.
Cost of Loadable Microcode
Lets take the more simple 6502 as example. Its PLA consists of 130x21 possible connections. That's 2730 points that each need (when set) a transistor (function). In reality, not all are populated, but for a loadable microcode each of these intersections need not only to have a transistor, but several: there must be, in addition to the one doing the connection, a static RAM cell for its value, made of 6 transistors. Additionally, address decoders and write lines are needed. Calculating the equivalent of 10 transistors per bit could therefore be a good assumption.
That's 27,300 transistors. That's about the same as a whole 8086 CPU. Considering that the 6502 has a total of less than 4000 transistor functions that's a total overkill and way outside everything possible back then.
But why do we have now loadable microcode?
With today's incomparably huge CPUs, the relation is different. A few thousand, even ten or hundred thousand additional transistor function aren't a big deal, but more than compensated by the ability for late time update.
Fine, but 1970s mainframes also had loadable microcode?
Yes, here again the ability for updates did justify the additional cost (*4) - just this time it was about the ability to sell new instructions / upgrades to existing customers.
Okay, But What About Second Source and Derivatives
I was thinking more along the lines of second sources and derivatives such as these ones for the Z80. That is whether the microinstructions would be the same between them (some standard Z80 microinstruction set). But it sounds like the answer is no.
(This additional question has been taken from the comments - see below)
Yes ... err .. no ... wait, lets split that.
A second source usually is meant to produce exactly the same chip, so customers have a fall back in case the primary source had trouble to deliver (or wants a better price :). Many companies wouldn't even think to buy chips that weren't available from a second source to avoid any lock in. Especially in the beginning, chip manufacturers where eager to get a second source for their designs to attract large customers.
Second sourcing was usually done by exchanging not only licences and schematics, but also all information down to masks. The resulting chips where supposed to be identical in workings, down to gate level. Only differences below, usually due to different manufacturing processes were (somewhat) acceptable. The intention was that second source chips can be ordered and used interchangeably with original ones.
Bottom line: Yes, as it's exactly the same CPU.
Derivatives are a different issue, these are chips made to work like the original but extend it, either electrically (like lower voltage) (*5), or with additional functionality. When not changing much (and done by a licensee) these extensions are often done by little additions without changing the basic structure. On the other end, chips with large extensions or such 'just' being binary compatible may have not only a different microcode, but also greatly different internal workings. So no, rather not the same micro instructions, not even the same format.
*1 - this internal structure is also the reason for this otherwise unusual notation used throughout all Z80 documentation.
*2 - The structure is quite similar to a gate array - except that only needed inputs/functions are cast into silicon.
*3 - CMOS offers the feature to build rather complex gates with multiple inputs in a simple way - to some extend this is maybe the most unique feature about the Z80 design.
*4 - Well, for very early technology also loadable microcode was a way to speed up operation, but that's again a different story :)
*5 - Here exists a grey area between simple second sourcing and extending.