What was the halt instruction in early CPUs such as the Z80 and 8080 used for?
Stopping the system in a known state to allow a clean restart/react to external sources.
It's a very useful feature for embedded systems that react to external sources, but also as idle state for a more conventional kind of multitasking environment.
What use is it to enter a state that can only be exited via an interrupt or reset?
- Interrupt response is guaranteed to be the shortest possible.
- Interrupt response time will be within exact (short) boundaries.
- No need for complex schedulers.
- Easy chaining of (interruptable) cleanup and management tasks.
- Enabling special power saving (or otherwise idle) states.
Beside all the benefits for system design, in embedded the first two might be the most important. A Z80 interrupt response (until the first instruction of the interrupt routine is executed) takes 11, 13 or 19 cycles depending on the interrupt mode - plus the execution time of the instruction already in process. That adds anywhere up to 23 cycles. When waiting on a
HALT it will always be a maximum of 4, thus making interrupt response faster and more predictable.
Does a NOP loop use less power?
Not really, at least not within the Z80 itself. Maybe a bit due to a reduced load on RAM and other perhipherals, but again, it's rather negligible. This may differ on other CPUs. Especially complex ones can save quite a lot using similar instructions.
But the CPU also outputs a
/HALT signal to tell when waiting (*1,2). This can be used to disable other components, ROMs for example, as it's guaranteed that no access will be done while active.
Did operating systems (CP/M, Acorn MOS) or Basic variants make use of it?
Not the common ones and not as part of some regular OS handling. Then again it was used in 'drivers' like (IIRC) within the ZX80 video handling to wait for a screen to start. Similar other home computers (MSX?) did/could use it to synchronize animation with frame rate (VBL Interrupt) and/or screen manipulation with line or timer interrupts (*3).
Many embedded environments did use
HALT as core function within the scheduler.
Did people writing assembly programs for the CPUs make use of it?
Yes, quite a lot - at least when it came to control/embedded applications.
Aside: How would an interrupt cause an exit of the halt state? After executing the interrupt service routine, would the CPU not return to its previous instruction - the NOP loop?
Nop (SCNR) - When returning from the interrupt, the CPU continues with the next instruction. Keep in mind, it's not executing NOPs, it's just like executing NOPs. HALT is a single instruction, and the PC will already have advanced to the next instruction after it has been read in
M1. Thus an accepted interrupt will push the address of the next instruction and when POPed, execution continues there.
This is very handy for a real time/multi tasking system to seperate housekeeping from handling external requests.
*1 - On a 8080 D3 is signaling a halt state during status word output in T1 of M1.
*2 - On a 8085 S0/S1=0/0 signal a halt condition. Unlike 8080 and Z80 the 8085 also tristates all data, address and bus control signals.
*3 - While the 6502 did not feature a halt instruction (not until the 65C02), Atari's TIA for the VCS did implement hardware to make the CPU go into a forced halt state when accessing certain addresses much like a 'Wait for Line'-Halt instruction.