I'm curious about the transistor count of the VIC-II, the video chip in the Commodore 64. According to http://visual6502.org/wiki/index.php?title=Chips_in_our_collection the Atari 2600 TIA chip has 6193 transistors; each of the custom chips in the Amiga has about 20,000; I would intuitively expect the VIC-II to be somewhere in between those two.

It occurs to me that one possible line of reasoning is based on the existence of 'bad lines' when the video chip reserves more bandwidth to read character data (40 bytes) and color data (40 nibbles), or more specifically, the fact that these occur only once every eight scan lines. That means the data must be stored in the chip for the next seven scan lines, until the next row of characters.

40x8 + 40x4 = 480 bits. The usual count of transistors to store a bit is six transistors in a flip-flop, so that's 2880 transistors. There will also be access circuitry; let's round it up to 3000.

That wouldn't be very informative lower bound on the chip size, but it is also said that about 70% of the chip area is spent on sprites. That brings the lower bound (if sprites and character/color buffers were the only components) up to 10,000 transistors. In practice, there are also other components; the actual size might be something like 15,000 transistors?

Does anyone have a more accurate estimate? If not, does the above reasoning look sound and the above estimate look in the right ballpark?

  • 4
    There are die shots. Here you can directly grab the 742MB hi-res VIC-II R3 The page describing the images on the FTP server too. Happy counting!
    – Brian H
    Jun 17, 2018 at 18:50
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    The VIC-II does not reserve more bandwidth to read 40 nybbles (those 40 nybbles are color RAM, and are directly connected to the VIC-II's 12-bit databus and is read directly from external memory every single cycle, along with the bitmap or character data. But the VIC-II does steal more bandwidth to read the screen RAM, which it reads at a rate of 40 bytes (80 nybbles) every eighth scanline. This is the data that is buffered inside the chip. That's 320 bits, not 480. but I can't explain why Jules only counted 240. Dec 18, 2018 at 13:39

2 Answers 2


Looking at this image from the link Brian H provided, there is an array of memory cells in the top left -- but it's smaller than you predicted: I count 240 bits (12 rows of 20 columns), so 1520 transistors + decode logic = about 1700 transistors.

There's also what I take to be a smaller array of registers at the bottom right of the image: 4 registers x 8 bits each (these are built with much larger transistors, so are potentially output buffers that need to supply large amounts of power). Next to that there's what seems to be a small mask ROM (Looks like about 56 bytes).

To the left of that and stretching up to the memory area are 4 major, distinctly different functional units. Each of them seems to operate with 8 bits arranged horizontally across the image, and they feed into each other in some kind of pipeline. They have approximately similar size, and taking one of them and examining one of its apparently 8x8x3=192 units there are approximately 6 transistors in them, so lets estimate all 4 of those units as 2000 transistors each.

There's connection logic between each of the four units, probably totalling about another 1000 transistors.

There's also a section of random logic in the top right and stretching down the right edge of the image. This looks to me to contain roughly another 2000 transistors.

I'd therefore guess at about 13000 transistors total, which agrees with your rough estimate quite well.

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    Do you have any idea if the VIC-II uses static RAM for its character-line buffer? I wonder how the space required to do that would compare with the space required to use dynamic shift registers? When using two-phase clocking, each bit requires four active transistors and two passive pull-ups. When using N-phase clocking, each (N-1) bits requires 2N active transistors and a passive pull-up. Two-phase clocking might require less space for running clock wires, but three-phase clocking could cut the number of transistors by 25%.
    – supercat
    Jun 18, 2018 at 16:05

My estimate is approximately 9,000 transistors.

If you look at the top left of the die, we have storage of 40*12=480 bits. I assume it is one transistor per bit, not 6 transistors per bit as in the case of SRAM. It occupies about 1/14th of the die by my estimation. From that, --> 9,000 transistors.

Al Charpentier (the designer of the VIC 2) said it has double the number of transistors of the 6502, which he estimated to be 10K, and arrived at 20K. But 6502 has 4500 transistors, therefore --> VIC 2 has roughly 9,000 transistors.

Also, Amiga Agnus according to one source is 21,000 transistors. VIC 2 ought to be less. Let us assume half...

  • How would that memory be occupying one transistor per bit? If that's possible, why does anyone use SRAM?
    – rwallace
    Dec 26, 2022 at 5:03
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    DRAM has one transistor per bit. In order to preserve the charge on the transistor ( as it is volatile memory,) it is periodically refreshed (either read or read and written to). SRAM may be preferrable in some cases as 1) it is faster 2) does not require refresh circuitry. The VIC 20 used SRAM for main memory, not DRAM. Another example, PC Engine/TurboGrafx used SRAM for video memory. Dec 27, 2022 at 6:22

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