It appears to have been used for some kind of factory testing. It seems to hook into the PROM bus so it's likely to allow reprogramming of the boot PROM, a socket for a ROM emulator, or to allow easy connection of an alternate (diagnostic) ROM. The presence of a chip select line makes me suspect it's the latter. The documentation I've seen is not really clear on this and it's possible that different versions had different functionality. It's probably not for general QA or the like since the boards also have JTAG headers.
I don't have a 32-pin pinout but here are a couple of variants that should give you an idea of how they functioned.
28-pin (SROMBOlite):
+5V 1 2 GND
EB_RD_L 3 4 EB_WR_L
EB_SCC_CS_L 5 6 EB_LATCH
EB_RDY_L 7 8 EB_DAT0
EB_DAT1 9 10 EB_DAT2
EB_DAT3 11 12 BRST_L
EB_DAT4 13 14 EB_DAT5
EB_DAT6 15 16 EB_DAT7
ROMBO_CS_L 17 18 EB_ADR0
EB_ADR1 19 20 EB_ADR2
EB_ADR3 21 22 SYNC_SER_IRQ_L
EB_ADR4 23 24 EB_ADR5
EB_ADR6 25 26 EB_ADR7
+5V 27 28 GND
and the 34-pin SROMBO variant:
ADR19 1 2 VCC
ADR16 3 4 ADR18
ADR15 5 6 ADR17
ADR12 7 8 ADR14
ADR7 9 10 ADR13
ADR6 11 12 ADR8
ADR5 13 14 ADR9
ADR4 15 16 ADR11
ADR3 17 18 RD_L
ADR2 19 20 ADR10
ADR1 21 22 ROMBO_CS_L
ADR0 23 24 DAT7
DAT0 25 26 DAT6
DAT1 27 28 DAT5
DAT2 29 30 DAT4
GND 31 32 DAT3
NC 33 34 WR_L