TL;DR: With what values are the I/O port registers (locations $00 and $01) on the 6510 initialised when it is powered on?

I'm writing a Commodore 64 emulation. The Commodore 64 uses a 6510 microprocessor which has an I/O port built in. The I/O port is accessed at locations $00 (data direction) and $01 (data). I found lots of documents explaining how the thing works, but nothing so far on how it is initialised.

The I/O port is the main means of controlling the RAM bank switching, so how it is initialised is critical. For example, if bit 1 of the data direction register is 1 (for output), the ROM between $E000 and $FFFF is controlled by bit 1 of the port (1 = ROM, 0 = RAM).

So on the Commodore 64, unless the data direction register is set for output and the I/O port bit 1 is set to 1, there is RAM at the top of the address map and crucially the reset and interrupt vectors are not accessible. However, the designers of the 6510 probably would not do this because they wouldn't have known what I/O devices are connected to the port.

The I/O port doesn't drive the RAM bank switching directly, but via a PLA so I'm guessing that the DDR and the port are initialised to 0 when the processor switches on and the PLA keeps the ROM selected until the C64 has set the direction and port data correctly. (Maybe there's some sort of tri-state thing going on with a pull up resistor or something.)

Is my assumption correct?

  • 1
    If a bit in the DDR is set for input, the output is floating. The –LORAM, –HIRAM, and –CHAREN lines have a 3.3kΩ pullup to +5V, so they are high in that case. – Janka Sep 30 '18 at 14:10
  • The real question is if a –RESET clears the DDR and the port register. IIRC no. With certain games, you could switch off the computer, switch it on again a second later and it would not reset correctly, because the ROM was still turned off. – Janka Sep 30 '18 at 14:14
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    @Janka that's the internal ROM checking a signature at $8000 to see if a cartridge is plugged in, and transferring control to it if the magic value is there. You can fool this detection by having a cartridge signature in RAM, then as long as the memory contents are intact, the ROM reset routine thinks that there is a cartridge plugged in. – berendi Sep 30 '18 at 14:44
  • Ah, yes, forgot about that. I used it myself once! So the DDR and port are set to 0 on –RESET. – Janka Sep 30 '18 at 15:10
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    @Janka The actual check at reset looks for the byte sequence $C3,$C2,$CD,$38,$30 at address $8004, and does a JMP ($8000) if present. – berendi Sep 30 '18 at 15:10

Yes, your assumption is correct.

Like in any microcontroller design I know of, I/O lines with programmable direction are set to input on reset. The 6510 is no exception, its data direction register at address 0 is set to 0 on reset, all 6 I/O lines become inputs. The circuitry outside the processor includes a pullup resistor on the I/O lines controlling banking, so that they are in a known stable state even if the data direction is set to input.


yes ddr register is set to input on reset and because of the pullup lines for charen loram and hiram its a logical 1.

take a look at the Pitfall 2 cartdrige. it works with vice 3.1 but not in 3.2. The init value of the data port register was changed from 0x3f to zero between both versions.

whats happening in 3.2: the game changes ddr to output but not the data register at address 0x1. The cart sets a zero for game and exrom line. means all 5 pla pins become zero. that results in a ram only memory configuration. the game maps out by itself and can not write the data port anymore which results in an empty screen.

it seems the data register at address 0x1 is not inited with zeros OR a input direction overwrites the data register with the external value for the appropriate pins. in case of charen, loram and hiram with a one because of the pullup resistors.

EDIT: maybe a ddr change from input to ouput doesn't update the io lines with the current contents of the the data port register. by disabling this in vice the game works with zero initialized port register, because it writes the port register after it seted ddr to output.

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