Before integer multipliers in silicon, several cpus had some support for multiplication. For instance SPARCv7 has the MULScc multiply-step instruction (several other cpus also have this).
As far as I know, PA-RISC computers before PA-7100 (probably) had no hardware for integer multiplication, but support for multiplication with a constant was enhanced beyond the usual shift and add instructions. Multiplication by a constant could be given by a sequence of instructions add, sub, sl, sh1add, sh2add, sh3add, neg and shl, see https://patents.google.com/patent/US5764990A/en
Were there other cpus, earlier or later, that used the strategy of PA-RISC (sh1add, sh2add, sh3add)?
(x<<a)+ykind of instructions has a lot of usage in address generation and pointer arithmetic, e.g. to increment