I hope this is the right place to ask this and that it is "retro" enough. I have a Socket 7 machine that I am working on. It's my 1st PC from childhood that I restored, and now I would like to upgrade it.

The system is a FIC VT-502 with a Cyrix 6x86MX PR166 and (currently) 48MB of SIMM memory. The motherboard supports both EDO SIMM and SDRAM DIMM, as seen here: https://www.vogonswiki.com/index.php/Socket_7_Builds#Choosing_RAM

I want to upgrade to using 128MB of RAM and, if possible, use SDRAM (because I can, and because it seems to be cheaper). I found some SDRAM on a site called MemoryX (or MemoryTen), but when I installed it, each stick was only read as 16MB, for a total of 32MB! Here's what I bought, claiming to be 64MB each stick: https://photos.app.goo.gl/SurvJWmKxdrPbZ5Q8

Doing some research, I found http://redhill.net.au/b/b-98.html#ram which explains this issue:

most older mainboards do not understand 64Mbit [megabit] chips and see a standard 64MB [megabyte] DIMM as eight 16Mbit [megabit] chips

So, my question is what should I be looking for when trying to buy 128MB (2x64MB) of SDRAM for my system? Do I want single-sided or double-sided RAM? How many chips should be on the stick? Or should I just stick with SIMM and get 128MB (4x32MB) of SIMM?

  • 1
    Is your BIOS the latest version for your motherboard? Oct 19, 2018 at 16:53
  • @traal Yes, it seems to be. I got the latest from: fic.com.tw/support/motherboard/bios/pre/vt-502_bios.aspx
    – gen_Eric
    Oct 19, 2018 at 17:07
  • @traal I am actually currently on a newer version than that one, that I found at: ftp.fic.com.tw/motherboard/bios/socket7/vt-502/y2k
    – gen_Eric
    Oct 19, 2018 at 17:07
  • 1
    If the problem is that the MOBO designer didn't bother with traces to connect address lines that would never have been used with the RAM sticks available at that time, updating the BIOS isn't going to help!
    – alephzero
    Oct 19, 2018 at 17:47
  • 1
    AFAIK the 32GB disk limit was about software not hardware, so an updated BIOS would fix it - if such an update was available for the MOBO you want to use, of course.
    – alephzero
    Oct 19, 2018 at 20:10

1 Answer 1


The change from DRAM to SDRAM changed how addresses are communicated from the processor to the RAM. In DRAM, addresses are divided up as a row and column address, each using roughly half the bits supported by the chip. The row is sent whenever it changes and the column for every access; its an arrangement designed to reduce the number of address pins required for any given address space.

In SDRAM an extra part is added, the bank address. This address usually has only a few bits, and in small DIMMs is entirely unused. However, starting at 32MiB there are no longer enough address lines on a DIMM to work with just row and column addresses, so the system must use bank addresses. As the specification supports up to 4 banks, this means 64MiB is the largest 168 pin DIMM available.

What this means is that early machines that supported DIMMs but weren't designed with this kind of memory size in mind only implemented the logic to work with a single bank, so could only use up to 16MiB per DIMM. This was likely especially common on boards that also supported SIMMs, simply because then the way of working with the two types of memory is more similar.

  • So, when my board claims to support 128MB of RAM, it was referring to using SIMM not SDRAM DIMM?
    – gen_Eric
    Oct 19, 2018 at 18:33
  • 1
    Yes, probably. 128MiB is 4x32MiB, which is the maximum size of a 72 pin SIMM, so assuming you have 4 SIMM slots this is probably what they meant.
    – Jules
    Oct 19, 2018 at 18:41
  • The board has 4 SIMM slots and 2 DIMM slots. I have sourced 128MB of SIMM (4x32MB), so that may be what I need to use.
    – gen_Eric
    Oct 19, 2018 at 18:43
  • 1
    I seem to remember that performance (i.e. access speed) issues caused by using or not using bank switching (e.g. whether one large RAM stick was faster or slower than four each of 1/4 the size) lingered on beyond the "retrocomputing" era.
    – alephzero
    Oct 19, 2018 at 20:15

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