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What is the size of each cache block in a SPARCstation 1+?

The only information I found about the cache was that it is "64K write-through cache, direct-mapped, virtually indexed, virtually tagged, 16-byte lines; 50ns cycle"

I'm assuming that, since it's direct-mapped, the size of the block can be calculated by dividing the size of the cache by the size of the lines, which would be 65536 / 16 = 4096 Bytes = 4K Is this correct?

Also, how would one determine it's L1 cache miss penalty time?

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  • There's a datasheet for the processor in your machine here. However, it doesn't include the information you're looking for...
    – Jules
    Commented Nov 7, 2018 at 0:06
  • Thanks @Jules! That might be helpful for my next steps. Meanwhile, I've been able to confirm that @lvd's answer is correct Commented Nov 7, 2018 at 10:06

1 Answer 1

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"line" is exactly the cache block size you are asking about. So it had 4096 blocks of 16 bytes each.

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