In the Block Diagram the Stack Pointer Register (S) has a HOLD command in addition to the LOAD and BUS ENABLE commands. The HOLD command is linked to the S/S output of the Random Control Logic. What is the purpose of that line ?
A few years ago there was a reverse-engineered schematic of the 6502 available in the internet which shows the single transistors. (Maybe it is still available now.)
Back then I had downloaded that schematic so I could compare the "S" register to the "X" and "Y" registers right now:
"S" has three input lines (named "x1" to "x3" in the reverse-engineered schematic) while "X" and "Y" have two input lines ("x4" and "x5" respectively "x6" and "x7").
This makes me think that the block diagram is not correct because "hold", "load" and 2x"bus enable" are four inputs while there are only three inputs in the schematic.
There are more oddities in the block diagram...
So I simply assume that this diagram is not correct.