Back in the days of Parallel ATA (a.k.a. IDE) it was possible to connect two drives with a single cable. The ATA standard defines a number of modes with different speeds which the drives and the controller use to communicate over the ATA cable. Controllers could support a feature called "independent device timing" to allow each drive to communicate at its fastest speed, instead of both drives being slowed down to the speed of the slowest drive. How did that work at the electrical and protocol level?
Naively I would think that the slower drive would get confused by the higher clock speed data transfer for the faster drive, and if not locking up outright it would not be able to detect when the transfer for the fast drive would be finished and so when it could expect a next transaction directed at itself. But apparently that didn't happen, so how was independent device timing implemented?
edit: clarify I'm talking about ATA interface transmission speed, not the drive's own read/write speed