It has a button on the front panel to single-step the CPU one instruction at a time... Except that, on closer inspection, that's not actually what it does.
Exactly, and it's not what the button is intended to do. The purpose is not to single step an instruction, but to single step a cycle.
That's a slightly strange way of doing things.
No, it's exactly what what is needed. For one, single stepping an instruction sounds nice for software developers, but when it's about hardware, and that's what a CPU (and the Altair) is about. With cycle stepping the user is able to see every machine cycle and ho the bus reacts displayed.
On a closer look, this is exactly what you want as well as a software developer. The Altair CPU is an extreme bare bone construction. Just the CPU itself, a clock generator, an 8 bit port and a bit of glue logic. These switches and LEDs are your interface to the machine. Your terminal and your debugger. And all debugging functions there are.
There is no monitor program
Looking close you won't find any button to read out a register (like on a mainframe) or modify them. All you can do is look at the content of a memory address, modify it, and single step the CPU. And that's exactly how you follow the execution of a program and examine it's working.
- First you see the address of the instruction fetched - go decode it from memory.
If the operation has parameters:
- You'll see address and value of all operands fetched (one byte per step) - remember it
If the instruction des some memory access:
- You'll see what address the CPU accesses and what values are read or stored.
If you remember all of this, your imagination will show you a debugger line of the instruction executed including all memory fetches and reads or writes. Cool, isn't it? And none of this would be visible if the button would be to single step on instruction level. All shown would be address and opcode of the next instruction to be executed.
Keep in mind, this computer operates at the lowest end possible. No software preloaded. Getting a PROM with some monitor program would have been an additional investment and another board to plug in - not to mention the need to buy a terminal of some sort.
Considering this it's amazing how much can be done by just looking at each cycle. And here also a major difference to mainframes is to be seen. mainframes don't eat and execute instructions on a byte level, but fetch whole instructions and then execute them. In so far a mainframe works more like a RISC CPU than a classic microprocessor.
The cost-optimised Intel 8080 IC that powers the Altair was not designed to support single-stepping, so the people at MITS had to come up with a kludge to make a CPU "single step" when it wasn't really designed to support that.
Nop. As explained, MITS did use this to allow program development and debugging on a very low hardware level, without any software involvement and still be able to provide some information.
From the CPU's point of view it would have been no issue to implement single stepping on instruction level as well. All needed to provide this is using the
M1 signal provided by the CPU instead of
PSYNC (as the excerpt provided in manassehkatz' answer describes) to reset the single step flip-flop. Of course now, not useful information beside instruction address and opcode can be derivated.