From a modern chip design perspective, the design of bi-quinary adders is quite simple. The addend inputs are each composed of two 1-hot signals, and the sum output is two 1-hot signals as well. This is by the nature of bi-quinary, where the quinary part is 1-hot by definition and the binary part is a 2-bit signal that is 1-hot by convention, being either 01 for "zero" or 10 for "five". The latter also being 1-hot makes things easier.
A simple AND-OR tree suffices for adding these. In a biquinary half-adder each one of the outputs in the sum is just a multiple-input OR of the ANDs of the various input combinations that result in that digit. For examples: C4 is a multiple-input OR of ANDs of all of the bit combinations in A and B that result in a "four" in the quinary part. C00 is multiple-input OR of ANDs of all of the bit combinations in A and B that result in a "zero" in the binary part.
In a biquinary full-adder there is not all that much added complexity. The carry-in simply left-rotates the quinary part of one of the addends, and any rotation off the left-hand end of that addend is an extra input to the tree that sums the binary parts, alongside any carry from the addition of the quinary parts.
That is the modern view, at any rate. It was not quite done that way back in the days of relays.
The AND-OR tree was a matrix of relays, each combination of signals opening up a specific path (to ground) for the appropriate 1-hot outputs.
Carry-in and carry-out were also a 1-hot pair of wires, 01 for "no carry" and 10 for "carry". This, in combination with the binary parts of each addend being 1-hot, meant that the "binary side" of the adder was also a simple exercise in AND-OR logic, and a relay matrix too. And, of course, so to was the rotation.
Caesaro 1946 has a diagram of the relay matrix for a 1-digit biquinary full-adder in the Bell Laboratories' Relay Interpolator. Das et al. 2015 has a more modern block diagram and truth tables for the various outputs. It places the carry-in handling logic closer to the final output, rotating an intermediate result instead of one of the addends, does not have 1-hot carry, does not have 1-hot binary parts for the addends, and uses inverters (where a 1-hot design of course does not).
- O. Caesaro (1946). "The Relay Interpolator". In B. Randell: The Origins of Digital Computers: Selected Papers. Springer Science & Business Media. 2012. ISBN 9783642961458. DOI: 10.1007/978-3-642-61812-3_20
- Kunal Das, Arijit Dey, Dipannita Podder, Mallika De, and Debashis De (2015). "Quantum Dot Cellular Automata: A Promising Paradigm Beyond Moore". In Mourad Fakhfakh, Esteban Tlelo-Cuautle, and Patrick Siarry: Computational Intelligence in Digital and Network Designs and Applications. Springer. ISBN 9783319200712. DOI: 10.1007/978-3-319-20071-2_11.
- William Keister (1951). "Circuits for calculation". The Design of Switching Circuits. Bell Telephone Laboratories series. Van Nostrand. pp. 462–472.