Questions tagged [6502]
For 6502 series of processors, including hardware and assembly language questions. Use with [hardware] for the hardware interface in particular.
156
questions
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Why was the 6502 version of Microsoft BASIC coded like the 8080 and 6800 versions even though this was rather inefficient?
It's quite clear that the 6502 version of Microsoft BASIC at all levels uses substantially the same structure and technique as the earlier 8080 and 6800 versions. As has been pointed out in various ...
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2
votes
2
answers
280
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From an electrical and software engineering perspective, ignoring available software, should I go for the Z80 or 65C02? [closed]
This might be a weird title but I noticed that recommendations for one over the other usually go into a direction that is not too helpful for me.
I would like to build an 8 bit computer and picked ...
- 29
2
votes
1
answer
268
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Obtaining a CPU execution trace on a Commodore 64 [closed]
I need to collect the execution trace of all instructions executed by the 6502 on a C64. I tried C64 Debugger, but I couldn't find any option for this. Is it possible to obtain with C64 Debugger? Are ...
- 291
9
votes
1
answer
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What is the purpose of the 2x4-bit split of the PCH incrementer?
On this detailed 6502 block diagram that can be found all over the net, the increment logic for the high byte of the program counter is split into two 4-bit parts, with a named PCHC line for the carry ...
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8
votes
1
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234
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How does the VIC-II/CPU memory access work on the C64?
As a programmer I knew that on the C64 the CPU got the bus in the high phase of PHI2 and the VIC-II got it in the low phase and also stole extra high phases when required.
However, it wasn't until ...
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5
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0
answers
335
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Transistor-level schematic of 65C02
I am looking for a transistor-level schematic for the 65C02, something like the one for the 6502 created by davidmjc (https://github.com/davidmjc/6502).
I am a teacher planning to give a student ...
- 1,215
1
vote
1
answer
188
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Transfer between bus and register in 6502 CPU
For one register of 6502 CPU (here X Index register) :
If the SB/X (load) signal and X/SB (bus enable) signal are both asserted at the same time, what happens ?
X Index register take the bus value
...
- 389
2
votes
1
answer
192
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Timer B Interrupt occurs only once
I was following this tutorial on Commodore 64 timer interrupts and tried to replicate it (except all I was planning on doing was changing the border color.) I noticed that my interrupt only occurs ...
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3
votes
1
answer
201
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Did any 6502-based system with cycle-stealing memory access steal the first available read, rather than asserting READY three cycles early?
On the 6502, the READY signal may be used to extend read cycles indefinitely, but will have no effect if asserted during write cycles. As a result, many devices that need to steal cycles from the CPU ...
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14
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3
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When was the 6502 second sourced?
According to https://en.wikipedia.org/wiki/Second_source
MOS Technology licensed Rockwell and Synertek to second-source the 6502 microprocessor and its support components.
This makes sense; the 6502 ...
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9
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2
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How did the 6502 designers intend for the indirect addressing modes to be used?
The 6502 has three indirect addressing modes: Indirect, Indexed Indirect (Indirect,X) and Indirect Indexed (Indirect,Y). Indirect is only used on the JMP instruction, no other. Why was this mode ...
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16
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3
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Can the 6502 clock be changed on the fly?
I was wondering if the original NMOS 6502 has any timing limitations on changing the clock rate during operation?
I ask, because the CSG 8502 version could "run at double the clock rate of the ...
- 15.3k
12
votes
1
answer
735
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How common was MADSEL?
I recently completed a software disassembly of the 1980 coin-op arcade game Missile Command. I'm curious whether a feature of the hardware is unique or commonplace.
First, a bit of background: ...
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11
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4
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Could the Z80 do interference-free video as the 6502 could?
Technically this isn't just about video since it applies to any regularly
scheduled DMA¹ from a non-CPU subsystem, but video is the most common
application of this technique so I'll use that as the ...
- 21k
6
votes
1
answer
217
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What bit do the BBRn/BBSn opcodes check?
I am working with a W65C02S chip and it has extra opcodes, BBRn and BBSn that branch on a bit set, or bit reset. However, I cannot find on which register or memory location this check is done.
When ...
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2
votes
1
answer
131
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CC65 ignores request to correctly offset memory areas in output files
I'm trying to segment my C code into two distinct memory areas, one which will be flashed to a ROM chip and another which will end up somewhere else. Here is what I have in sbc.cfg (I was originally ...
- 123
8
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0
answers
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Systems that used the Rockwell R65C00/21 or R65C29
The Rockwell R65C00/21 and R65C29 are described in an October 1984 datasheet ("R65C00/21 dual CMOS microcomputer and R65C29 dual CMOS microprocessor," Document no. 29651N64, rev. 2) which is ...
- 1,215
5
votes
1
answer
341
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Apple II Assembly DSECT
I'm trying to define a section of data in a program. The Apple 6502 Assembler/Editor mentions an assembler directive called "DSECT" but I can't tell if I'm using it correctly or not. Here is ...
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24
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2
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Was leaving all xxxxxx11 opcodes unused on the 6502 a deliberate design choice?
The 6502, like many 8-bit processors, has a somewhat arcane opcode-mode restrictions. On most such processors, the restriction is a clear result of trying to pack a lot of instructions into a limited ...
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2
votes
1
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260
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How to properly convert an active-low joystick routine to active-high
My last question wasn't specific enough so I'll rephrase it. I've been having trouble with programming game consoles/computers like Commodore 64 that have active-low joysticks, where the bits are all ...
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17
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3
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What is the purpose of mirrored memory regions in NES's CPU memory map? [duplicate]
[Please see answers to this related question as well]
I've started reading the "official" NES Documentation and in page ten, it says that "memory locations $0000-$07FF are mirrored ...
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6
votes
1
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Commodore 64 sound seems to freeze at a high pitch if executed too soon after startup
I created this little sound driver for sound effects, it makes a classic "laser beam" sound you would hear in old arcade games. There's just one problem, and it's a bit of a strange one.
I ...
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3
votes
1
answer
136
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Spontaneous movement and game crashes from active-low joystick routines [closed]
I've noticed this recurring problem when I'm trying to program joysticks or buttons that are active-low (0 = pressed), like on the Commodore 64 or Game Boy Advance. Regardless of the language or ...
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4
votes
2
answers
526
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How to wait for vBlank on Commodore 64
I'm not new to 6502 Assembly but I am new to the Commodore 64. I'm used to the NES where you have to write everything yourself, such as the NMI/RESET/IRQ vectors, etc, but from what I understand the ...
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5
votes
2
answers
368
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Macro for counted string accepting multiple arguments?
Using ca65 assembler, I'd like to use a macro to encode a string as a pascal style string or FORTH counted string with a leading length byte.
In ca65 documentation there is this example:
....
11
votes
3
answers
2k
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Protecting 6502 decimal mode code from interrupts
A common idiom in 6502 assembly code is to protect sequences of code that rely on decimal mode from being interrupted. This because an interrupt handler typically clears decimal mode (cld), and thus ...
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9
votes
3
answers
991
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C++ compilation for the Z80 and 6502?
I know it's almost heresy to ask something like this, but ...
We have C compilers for the Z80/6502 and there used to exist a thing called the Comeau C++ compiler, that produced C code as output. There ...
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1
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Is there a way to use .ident or * (PC) in numeric macro variables (using .set)?
I'm trying to write a macro to create "headers" in a linked list fashion.
In each header the first 2 bytes should be the address of the previous header starting address (0000 in the first ...
6
votes
1
answer
402
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Where does the 6502 store the low order byte after fetching for read instructions?
I am trying to get a mental model of how the 6502 operates. I am going off this image:
However please suggest a better one if it helps understanding .
On this website it describes how a read ...
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6
votes
1
answer
623
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Why does the JSR operation not jump?
I am building a computer based on the 65C02S, and when stepping through the code, I see strange things happening.
This is my code:
SEI
CLD
LDX #$ff
TXS
JSR someRoutine
...
This translates to this ...
- 809
6
votes
2
answers
594
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Why doesn't Visual6502 simulate RRA in the way I expect?
As everyone knows, the 6502 has many many undefined opcodes. One of these is RRA, which essentially performs both ROR and ADC.
From what I understand of hardware (really not much) and the explanation ...
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15
votes
2
answers
2k
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Why does the 6502 JSR instruction only increment the return address by 2 bytes?
Currently messing with 6502 assembly on a C64, and I don't understand why the JSR instruction is so weird.
According to the instruction table, JSR is a 3-byte instruction and only operates in absolute ...
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2
votes
1
answer
212
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How to convert series of hex digits in memory into the format for use with Applesoft math subroutines
I'm trying to write a calculator program in assembly for the Apple //e. I know that there are built-in subroutines for performing all kinds of math operations involving the floating-point accumulator (...
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9
votes
1
answer
538
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Why does the 6502 read from the stack before writing it?
I am building a W65C02S based computer for fun, and I try to build basically all the tools myself. Including the assembler (yes, I know they exist, I just want to make everything from scratch myself, ...
- 809
14
votes
1
answer
2k
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How did the 6502 CPU get its name?
I am interested in the etymology of the name for the 6502 CPU. How were those numbers arrived at by the designers? Do they refer to anything specific? Is there some sort of origin story?
I found some ...
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votes
1
answer
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6502 double store and copy protection?
I was watching a video on netlist simulation of the 6502. The presenter mentions how the 6502 has a double store upon using INCY, and then offhandedly mentions that this can be used for copy ...
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3
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What is the MOS 6502 doing on each cycle of an instruction?
So, first off, I am kind of a noob with emulators and the 6502.
Summarise the problem
If we for example take the instruction ADC Immediate ($69) which adds the accumulator to an immediate value and ...
user20750
4
votes
2
answers
450
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How much memory does this SYM-1 have?
I have a SYM-1 with the following memory configuration:
How much memory is that? Those all appear to be L2114UCE chips, which are described as "Static 1024x4 NMOS RAM", but I'm not sure how ...
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4
votes
1
answer
549
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Sym-1: What is the "f" register?
Running SUPERMON on a Synertek SYM-1, the R (REG) command cycles through a number of registers. Most are self explanatory:
p is the program counter (pc)
s is the stack pointer
a, x, and y are obvious
...
- 417
6
votes
1
answer
197
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Chaining IRQ's with BASIC & Kernal routines turned off
Having disabled BASIC and Kernal routines I set up an IRQ to run the following code when the raster line reaches 200:
.irq1
inc 53280 // change border colour
// lda #$ff // clear the ...
user16295
6
votes
4
answers
1k
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Efficient way to JMP or JSR to an address stored somewhere else?
I'd like to JSR or JMP (preferably JMP as it's 3 cycles cheaper) to an address stored somewhere else in memory, the address of which is itself indexed.
I came up with the following self-modifying code ...
user16295
1
vote
1
answer
353
views
Defining a C function with given address in cc65
I have a function that should be callable with the following syntax:
void __fastcall__ initSIDplayer1(uint8_t a);
The __fastcall__ modifier here means that the argument is passed in the Accu instead ...
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votes
3
answers
637
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How was “Super Mario Bros” made with Assembly if the DASM compiler came out in 1987?
Would somebody care to explain how "Super Mario Bros." was released in 1985. But the DASM Assembler came out in 1987?
The 6502 Assembly language was introduced in 1975. How would you compile/...
4
votes
2
answers
531
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The use of segments in non-relocating assemblers
I've been looking at a bunch of different 6502 assemblers recently (dasm, ca65, xa, kickass), and many of them have support for multiple code segments. Some of these assemblers can generate ...
- 417
2
votes
1
answer
115
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Defining zeropage address labels in xa assembler?
I am trying to use the xa assembler to write some 6502 code. According to the documentation, I can define a zeropage segment using the .zero pseudo-op. I was hoping to do something like this:
.zero
...
- 417
8
votes
2
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Basic / Assembler startup code (C64)
I'm just creating my own .prg file using NCurses Hexeditor in Ubuntu which I load using load"file.prg",8 in Vice. I followed the information in this link explaining how to create a .prg file....
user16295
12
votes
4
answers
835
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Commodore BASIC: why was the PET's GOTO so slow?
Received wisdom has it that Commodore didn't want to pay Microsoft extra for updated BASIC interpreters, and thus very little changed in Commodore BASIC v2 from the PETs to the C64. But consider the ...
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3
votes
1
answer
272
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Is there a way to have the ca65 assembler only expand macros?
I would like to convert an assembly program in ca65 with macros into assembly code with resolved macros in order to carry out manual or automatic optimizations with the resulting code. Then, the ...
- 4,080
11
votes
4
answers
1k
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Modulus arithmetic on the 6502
I have a very simple problem with is turning out to be surprisingly complex to solve.
I wish to add two bytes using modulus arithmetic, where the modulus is known at compile time. e.g. given modulus 5,...
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8
votes
1
answer
347
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Is there a possibility for a user-defined IRQ hardware vector on a Commodore 128 in C128 mode?
When an IRQ occurs, the 6502 microprocessor and its derivatives in the C64 and C128 push the status register to the stack and then load the contents of a two-byte vector at memory address $FFFE/$FFFF ...
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