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Questions tagged [65816]

Discussions related to the 65816 CPU.

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8 votes
2 answers
482 views

What is the relation between external clock and internal states in the 68000?

(I'm assuming a memory cycle of 500 ns, without wait states.) According to the 68000 bus diagram, there are 4 CPU cycles for a memory cycle, so an external frequency of 8 MHz. However, things are ...
airman's user avatar
  • 1,372
22 votes
7 answers
5k views

Why were there no 32-bit versions of 65xx CPUs, or 64-bit versions of m68k CPUs?

I don't understand why Western Design Center made the 65816 a 16-bit upgrade to the 6502 but Commodore Semiconductor Group/MOS Technology didn't make their own variant & why neither company made ...
6502Assembly4NESgames's user avatar
13 votes
1 answer
1k views

Did Nintendo pay WDC for their use of the 65816 core?

When Nintendo used the 6502 core in the NES (as part of the Ricoh 2A03/2A07 microprocessor and sound generator), they circumvented the 6502's patent protection by disabling the BCD arithmetic. As a ...
Michael Graf's user avatar
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21 votes
3 answers
5k views

What happened to the 65832?

In his June 1985 foreword to Programming the 65816 by David Eyes and Ron Lichty, Bill Mensch expresses his hopes for a 6502-derived 32-bit microprocessor: the 65832. WDC is still thriving, but the ‘...
Jacob Krall's user avatar
  • 2,299
16 votes
5 answers
3k views

Why isn't the WDC 65816 available in "externally" 16-bit versions?

Actually, unless there are actual design notes from WDC available, the question is really one too long for the title field: "What, precisely, are the disadvantages of having a version of the WDC 65816 ...
cjs's user avatar
  • 26.8k
4 votes
1 answer
241 views

65C816: Inputs TTL-compatible?

New 65C816 datasheets say that Vih (for the data bus in particular) is 0.8Vdd, i.e. not TTL-compaible. Old data sheets (for example, the one published in Apple IIgs Hardware Reference) say that at 5V ...
Zane Kaminski's user avatar
12 votes
2 answers
795 views

Early 65C816 CPU's SEP and REP instruction are followed by a NOP?

Why did early versions of the 65C816 CPU need a suffixed NOP to every SEP and REP instruction? I saw comments in some source code pointing at this. Looking around in official WDC's documentation and ...
Johann Klasek's user avatar
11 votes
2 answers
2k views

How does JSR actually work on the 65c816 CPU for the SNES (Super Nintendo)?

Take the following machine code for the 65c816 for the SNES (Super Nintendo): 00000000 ea ea 78 18 fb c2 18 a2 ff 1f 9a 20 fa 80 e2 20 |..x........ ... | 00000010 a9 80 8d 00 21 a9 e0 8d 22 21 ...
AlphaCentauri's user avatar
16 votes
2 answers
590 views

Inserting NOPs to improve IIgs shadow copy performance

The answer to this question discussed a technique on the Apple IIgs for copying memory onto itself. The motivation for the technique was to maximize use of "fast" (2.8MHz) RAM over "slow" (1MHz) RAM ...
fadden's user avatar
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