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Questions tagged [8086]

For questions specifically regarding the Intel 8086 16-bit microprocessor

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9 votes
2 answers
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How does the 8086 jump instruction work when the target address overflows?

For educational purposes, I'm developing my own software emulator for the 8086 microprocessor with VGA/MCGA support. Although it's far from complete, it's advanced enough to start using a BIOS (though ...
ExecAssa's user avatar
  • 101
4 votes
1 answer
197 views

8251A UART outputs unexpected data

I am currently prototyping an Intel 8088 system (Maximum Mode) on a breadboard. Later I want to move to custom designed PCB. To get some input and output, I wanted to use the 8251A chip. I have two ...
x95's user avatar
  • 151
18 votes
1 answer
2k views

What did it cost the 8086 to support unaligned access?

The Intel 8086 supported unaligned loads and stores of 16-bit data, e.g. mov ax, foo was guaranteed to work even if foo was odd. What did this cost, in terms of performance and chip area, compared to ...
rwallace's user avatar
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13 votes
1 answer
2k views

Did x86 CPU vendors like Intel, NEC, AMD, and Cyrix provide their own debugger for DOS with better CPU support and was it free?

MS-DOS's debugger DEBUG.EXE did only support the assembly/disassembly of 8086 opcodes. DR-DOS's debugger SID86.EXE, SID.EXE and Novel's debugger DEBUG.EXE did support 80286 opcodes and more, but no ...
Coder's user avatar
  • 1,068
12 votes
1 answer
382 views

What is the difference between the different versions of the SID or SID86 debugger for the x86 PC that was shipped with the different DR-DOS versions?

I did a little research about Digital Research's 8086 Symbolic Instruction Debugger. Short name SID86.EXE and SID.EXE in later versions. But I couldn't find some sort of version history? I would ...
Coder's user avatar
  • 1,068
0 votes
2 answers
367 views

Difference between the 8255 and 8042 PPIs

What is the big difference between the 8255 PPI and the 8042 PPI? (except that the 8255 has more IO) Things that I spotted: the 8042 seems to have its own clock (not using the CPU one) which seems to ...
juffma's user avatar
  • 195
13 votes
2 answers
2k views

Intel 80188 & 8087 clock frequency differences

Today I saw that the Intel APX-188/186 User's Manual states that you can use a 8087 as coprocessor for the 80188/186 (as the 80187 is only usable with the 186). But I was wondering about the clock ...
juffma's user avatar
  • 195
4 votes
1 answer
241 views

Are there multiple models of the Intel 8089 IOP?

As far as I'm concerned there is only one model of the Intel 8089 (the D8089A-3). I am not able to find any information on this. While the 8086,8088 and 8087 use the scheme of the last number (-3 in ...
juffma's user avatar
  • 195
9 votes
0 answers
189 views

What should be put to the first 128 bytes of the code segment in Xenix 86?

I'm writing a hello-world program for Xenix 86 in NASM. See the full source code. If I only put this to the code segment, then it fails with segfault (Memory fault) on Xenix 286: mov ax, 4 ; ...
pts's user avatar
  • 2,013
8 votes
2 answers
1k views

Tiny libc for DOS 8086

I'm looking for a tiny libc (C runtime library) targeting small model DOS 8086, and providing (most of) the C89 library functions, including fread(...), printf(...) and scanf(...). The libc must work ...
pts's user avatar
  • 2,013
30 votes
4 answers
6k views

Most modern C compilers targeting DOS 8086, running on DOS 8086 (16-bit)

I'm looking for the most recent versions of modern C compilers which were/are targeting DOS 8086, also running on DOS 8086 (16-bit). I'm mostly interested in production-ready C compilers, rather than ...
pts's user avatar
  • 2,013
11 votes
2 answers
719 views

When 8086 and 8088 actually sample READY to determine if wait states need to be inserted?

Just for hobby and research purposes I design an XT compatible machine based on 8086, and now I have to come up with a wait state generator for IO devices that are slow and require additional time to ...
Linol's user avatar
  • 113
14 votes
1 answer
1k views

What happens when the segment plus offset overflows 20 bits?

What happens if a segment register plus offset overflows the 20-bit address space of the 8086? I assume it wraps around to 00000h, but want to confirm. For example, say DS is F001h and the offset is ...
Jacob Krall's user avatar
  • 2,289
23 votes
3 answers
4k views

How does the BIOS distinguish Interrupt(08h-12h) from INT instructions, vs. actual exceptions inside the CPU?

This is purely academic, out of date, out of curiosity. Let's go back to the 1990s, before Windows, when real-mode DOS programs were common. The BIOS assigned INT 08H+ for their own interrupt handlers,...
THS's user avatar
  • 333
7 votes
2 answers
2k views

x86 memory alignment

For the 8086, unaligned word loads (first byte at an odd address) require two memory accesses, but an aligned word (first byte at an even address) can be loaded in one. This is excellently explained ...
Single Malt's user avatar
  • 1,859
23 votes
3 answers
6k views

Why are these DOS console drivers wasting precious bytes?

While doing some research on DOS device drivers, I took a peek at the console drivers DISPLAY.SYS and ANSI.SYS that are part of the DOS 6.20 installation. Both have "Microsoft" stamped on, ...
Sep Roland's user avatar
  • 1,185
23 votes
3 answers
4k views

What were the actual memory model definitions in MS-DOS?

I've heard the phrase "memory model" used in relation to MS-DOS programming (and early Windows), with terms such as "small" and "compact". But what were the actual ...
paxdiablo's user avatar
  • 4,917
4 votes
1 answer
227 views

Why 8086/8088 has OF in a high Flags byte?

In 8086, OF is put not into low Flags byte as other flags but separated in the second (high) byte. This is followed then in all the x86 line. Beside the possible historical reasons, this looks highly ...
Netch's user avatar
  • 530
6 votes
3 answers
749 views

Did Intel syntax for x86 assembly come from an Intel assembler?

I'm wondering where the so-called Intel syntax for x86 assembly came from. Did Intel release their own assembler for chips like the 8086 or do we just mean the syntax they used in the manuals?
Anthony's user avatar
  • 455
15 votes
2 answers
2k views

How to use "AND," "OR," and "XOR" modes for VGA Drawing

I've been trying to implement a blitter in MS-DOS, but before I do that I wanted to test the various graphics modes of the VGA graphics card. (I'm emulating using DOSBox.) According to this paper on ...
puppydrum64's user avatar
  • 1,638
0 votes
2 answers
223 views

why the result comes out as 1, rather than 2, in this 8086 Subtract with borrow? [closed]

STC MOV AL, 5 SBB AL, 3 ; AL = 5 - 3 = 2, but I am getting 1 .. why? RET
B.T.'s user avatar
  • 23
10 votes
1 answer
564 views

Undocumented ModR/M byte combinations

The reason I am asking this question is because I was trying to compile a list of all 8086 opcodes, regardless of whether or not they are documented. The list is just for fun, the documented opcodes + ...
DarkAtom's user avatar
  • 2,337
1 vote
2 answers
360 views

8086 assembly relative addressing issue [closed]

This tiny program puts a few A's into the text mode buffer of an ms-dos pc. But only works if the number of repetitions (CX) is loaded with a direct value. If I try to read that from memory, i.e. ...
Dercsár's user avatar
  • 695
21 votes
3 answers
3k views

Z80 to x86 asm translator?

8086 is source code compatible with 8080. Zilog Z80 extended Intel 8080 with: An enhanced instruction set including bit manipulation, block move, block I/O, and byte search instructions New IX and IY ...
Schezuk's user avatar
  • 3,754
14 votes
3 answers
4k views

What 8086 instructions accept REP?

I tried this code in my assembler, set to 16 bit mode: bits 16 rep mov ds, ax Surprisingly, no error was thrown. Is this even valid? Wasn't rep only supposed to work with string instructions? Is it ...
DarkAtom's user avatar
  • 2,337
-1 votes
1 answer
173 views

Possible and impossible RAM layouts in 8086 [closed]

The Intel 8086 CPU could address up to 1 MB of memory using segmentation, and this CPU have 4 segment registers, which are CS and SS and DS and ES. Each segment in memory can have a maximum size of 64 ...
Asra Zibaie's user avatar
5 votes
3 answers
3k views

8086 duration of program

I have the following assembly code for 8086 MOV AL, [BX] OUT DX, AL The bus clock frequency is 1MHz. Access to memory is done without WAIT, and to I/O with one WAIT tick. How I can calculate the ...
gameloverr2's user avatar
6 votes
2 answers
277 views

Are there any known 8086 systems that would dynamically switch between XTAL and EFI clocks on 8284 clock generator?

In an typical 1980s 8086 system the 8284 clock chip is typically used to generate the clock for the CPU. The 8284 has two clock sources XTAL and EFI. XTAL provides a steady clock source from a ...
user4574's user avatar
  • 398
4 votes
1 answer
1k views

Address of ISR for Interrupt INT 13H

The memory address in the Interrupt Vector Table of an 8086 associated with INT13H should be: 13H * 4H = 4CH But a book I was referring to says that: The physical address of the memory location ...
Fabhi's user avatar
  • 53
4 votes
3 answers
367 views

The 8086 has AAM (ASCII Adjust after Multiply), why not the same for packed BCD?

I'm just curious why the 8086 seems to be lacking in an adjust opcode for fixing up packed BCD multiplication. It seems like it would be a useful thing, and packed BCD seems to be more common to begin ...
8086fan's user avatar
  • 43
62 votes
7 answers
12k views

Why did the MS-DOS API choose software interrupts for its interface?

Access to the DOS API was done through the INT 21h x86 instruction. This was always counter-intuitive to me, coming from 8-bit systems that accessed system services by calling subroutines through a ...
Brian H's user avatar
  • 60.8k
12 votes
1 answer
1k views

Difference between Intel 8087 and 8089 opcodes

The 8087 floating-point coprocessor presumably used different ESC codes to the 8089 input/output coprocessor, since then they would be able to listen over the bus for their own ESC instructions. The ...
Single Malt's user avatar
  • 1,859
27 votes
4 answers
10k views

8080 vs. 8086 - Are 16 Bit CPUs bloaty by nature?

In comments to a parallel question (Why was IBM BASIC so Huge?) one point discussed is code density of 8 vs. 16 bit CPUs. Some assumptions were that 16-bit must be more bloaty due to its need for an ...
Raffzahn's user avatar
  • 225k
17 votes
1 answer
2k views

How does single-stepping on the 8086 interact with internal and external interrupts?

The 1979 version of the 8086 family user's manual is available at different places in the internet, see 1,2,3. It seems there is no newer version available. This manual documents the single-stepping ...
Michael Karcher's user avatar
19 votes
4 answers
3k views

80286 real mode emulator for 8086

While trying to use a "modern" sound card (an Aztech Sound Galaxy Pro 16 II) in an XT compatible 8086 computer, I encountered the problem that the drivers and tools (like the mixer initialization tool ...
Michael Karcher's user avatar
5 votes
3 answers
1k views

Need circuit - manual step-by-step clock for 8086/8088

I finally bought a ceramic 8086-1 (from ebay, from China - I'm not sure that it is not fake chip) and 8284 (it make the necessary synchronization signal for the processor from the crystal). Now I ...
Alex's user avatar
  • 471
17 votes
7 answers
3k views

8086 stack segment and avoiding overflow in interrupts

This is a followup to Could the Intel 8086 CPU have many segments in memory of the same type? In the event of a hardware interrupt or user interrupt through the INT instruction, was there a risk that ...
pjc50's user avatar
  • 1,015
7 votes
5 answers
916 views

Could the Intel 8086 CPU have many segments in memory of the same type?

The Intel 8086 CPU could address up to 1 MB of memory using segmentation, and this CPU have 4 segment registers, which are CS and SS and DS and ES. Each segment in memory can have a maximum size of ...
user14821's user avatar
17 votes
5 answers
3k views

Does the Intel 8086 CPU have user mode and kernel mode?

Does the Intel 8086 CPU have user mode and kernel mode as modern CPUs do? and if it doesn't have user mode and kernel mode, does that mean that any user program written for the Intel 8086 CPU could do ...
user14809's user avatar
  • 171
24 votes
8 answers
12k views

Why is the Intel 8086 CPU called a 16-bit CPU?

Based on my understanding, the bitness of a CPU specifies how much memory it can address (which is determined by the size of the CPU's address bus I guess). For example: a 32-bit CPU can address 232 ...
user14660's user avatar
  • 273
52 votes
4 answers
12k views

What did the 8086 (and 8088) do upon encountering an illegal instruction?

Preface: This question does in part intersect with Use of undocumented opcodes, but targets especially the 8086 instruction handling. I was reading Tanenbaum's "Operating Systems, Design and ...
Joe D's user avatar
  • 631
5 votes
1 answer
951 views

What can an 8086 CPU do if an x87 floating-point coprocessor is attached to it? [duplicate]

As far as I know, old x86 CPUs (for example: the 8086 CPU) couldn't do floating point arithmetic, and in order to be able to do floating-point arithmetic, an x87 floating-point coprocessor should be ...
user12280's user avatar
  • 293
38 votes
1 answer
4k views

How did the 8086 interface with the 8087 FPU coprocessor?

The 8087 has many instructions - too many, it seems, to be encoded as part of the 8086 instruction set. How did the Intel 8086 interface with an Intel 8087 FPU that a user added? Consider the ...
Jet Blue's user avatar
  • 2,005
17 votes
3 answers
3k views

What limited the use of the Z8000 (vs. 68K and 8086) CPU for 16-bit computers?

As compared with the 68000, which also was available from 1979, and which also started off quite popular in desktop-sized UNIX machines, it apparently has a much more sophisticated memory model, which ...
Omar and Lorraine's user avatar
13 votes
3 answers
5k views

Is there a cycle-exact 8086 emulator?

I'm trying to emulate programs from the 80s, but with an accurate clock-speed¹ (pretending its an 8086). Meaning that if a 8086 would take X ms/opcode, the emulator should take X ms (+- a bit of ...
multics's user avatar
  • 561
6 votes
1 answer
1k views

What instructions for the 8086 and subsequent x86 CPUs are not available in Long Mode?

I know from this answer that, Modern x86 CPUs are binary compatible with 8086. You can literally run 8086 binaries on a modern PC, in real mode. (The species analogy is a stretch here, but works ...
Evan Carroll's user avatar
  • 3,388
14 votes
10 answers
5k views

Can one isolate processes on a 8086?

I've read that modern OSes rely on hardware-powered process isolation to prevent processes (and/or users) from clobbering each others' RAM. But on Intel processors, this hardware was first included in ...
multics's user avatar
  • 561
55 votes
8 answers
11k views

Why didn't the 8086 use linear addressing?

The 8086 used a segmented memory architecture where the linear address was computed from a 16-bit segment number and a 16-bit offset. This greatly complicated things from a programming perspective. ...
Alex Hajnal's user avatar
  • 9,350
10 votes
2 answers
818 views

8086 pinout and address space limit

It is tempting to say - and I have said - that Intel made a mistake in the design of the 8086 and 8088, in going from 16 bit addresses to only 20 bits; if they had even shifted the segment registers ...
rwallace's user avatar
  • 62.4k
23 votes
2 answers
2k views

What are these tiny TSRs doing?

I've been puzzled by this for a while now. The (very old) game Phantasie comes with three small TSRs that are run prior to running the main game executable. This is the content of the file PH.BAT, ...
db2's user avatar
  • 1,487