Questions tagged [cpu]
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31
questions
6
votes
1answer
234 views
Did the CPU test on the Apple //e Diagnostics utility do anything?
After reading about the Apple //e diagnostics card, I noticed on the screenshot below that it reports a CPU test and that the microprocessor is OK:
So I'm curious did the PROCESSOR TEST actually do ...
19
votes
1answer
875 views
MOS 8502, just a 6510B?
I'm looking over what little I can find on the 8502, and from what I can see it appears to be a 2 MHz version of the 6510 with an extra I/O pin.
Much ado about the speed, but the Atari's 6502B's were ...
38
votes
1answer
3k views
Z80 CPU address lines not stable
I just got a Z84C0020PEC and wired it up to test it, using this circuit:
Except that I've added LEDs to A0 through A9. It appears that A0 through A6 operate correctly, but A7 though A9 (I've not ...
5
votes
2answers
766 views
GPU chip implementation on CPU - will it be faster? [closed]
So, modern video cards include two devices - a video signal generator and a graphic accelerator.
The first of them converts data from video memory into MDA / CGA / VGA / RCA / DVI / HDMI / etc format....
4
votes
0answers
150 views
Modern Alternative to Malvino's Digital Computer Electronics
For those who want to study retro computing in depth, starting by understanding 74xxx logic and CPU design is (IMHO), one of the best paths there is. Malvino's "Digital Computer Electronics" (DCE), ...
9
votes
6answers
3k views
Is there any music source code for sound chips? [closed]
I’ll clarify what I mean. The sound chip (c64's SID, spectrum's Yamaha, etc.) is connected either to the input / output port, which will be reserved for the sound chip, or directly to the CPU data bus....
5
votes
5answers
366 views
Could the Intel 8086 CPU have many segments in memory of the same type?
The Intel 8086 CPU could address up to 1 MB of memory using segmentation, and this CPU have 4 segment registers, which are CS and SS and DS and ES.
Each segment in memory can have a maximum size of ...
13
votes
5answers
2k views
Does the Intel 8086 CPU have user mode and kernel mode?
Does the Intel 8086 CPU have user mode and kernel mode as modern CPUs do? and if it doesn't have user mode and kernel mode, does that mean that any user program written for the Intel 8086 CPU could do ...
4
votes
3answers
251 views
How does states, bus cycles and clock cycles differ in the M68000?
I'm trying to understand the difference in bus cycles, clock cycles and states within a 68000 processor.
According to the user manual,
A bus cycle consists of eight states...
Lets assume the 68K ...
1
vote
1answer
300 views
Why doesn't the Intel 8086 CPU use real memory addresses? [duplicate]
The address bus of the Intel 8086 CPU is 20-bits, and when you want to specify a memory address to read from or write to, you would form the memory address using a segment register and an offset ...
13
votes
7answers
4k views
Does the Intel 8085 CPU use real memory addresses?
The Intel 8086 CPU uses memory segmentation, which means that when, for example, you write the value 123 to the memory address 1001, the memory address 1001 will actually get converted first into ...
6
votes
1answer
335 views
Tannenbaum paper on constants in ISAs?
I see many references to a paper by Andrew Tanenbaum that demonstrated the vast majority of constants would fit into 13-bits, and I seem to recall it being in my university text on CPU design. However,...
26
votes
3answers
5k views
Why did Intel abandon unified CPU cache?
When Intel introduced the 80486 in 1989, they included their first on-chip cache, ostensibly to compete better with Motorola, who had been including on-chip caches for 5 years (MC68020, 1984).
Unlike ...
2
votes
2answers
275 views
How exactly do all control signals in 6502 work?
I'm trying to make a 6502 replica in Logisim. I want to know what exactly each control signal in 6502, how the clock cycles work and additionally I would like to see an example of these control ...
9
votes
1answer
385 views
How did the Zip Chip and RocketChip accelerators work for the Apple II?
Though there is already a similar question on the site, this one is more specific to these chips and their technical implementation.
There were two accelerators for the Apple II series that were drop-...
18
votes
7answers
16k views
What does the “x” in “x86” represent?
I have read the following in the x86 Wikipedia page:
The term "x86" came into being because the names of several successors to Intel's 8086 processor end in "86", including the 80186, 80286, 80386 ...
22
votes
2answers
5k views
What was the last x86 CPU that did not have the x87 floating-point unit built in?
This Wikipedia page says the following:
Most x86 processors since the Intel 80486 have had these x87
instructions implemented in the main CPU
So the above quote implies that some CPUs that were ...
6
votes
3answers
597 views
How did 2-chip CPUs work?
The 1970s saw a big transition from CPUs built from thousands of discrete components, to CPUs implemented on a single chip, with the occasional use of bit-slice components along the way.
There were, ...
33
votes
2answers
4k views
Can an x86 CPU running in real mode be considered to be basically an 8086 CPU?
When an x86 CPU is running in real mode, can it be considered to be basically an 8086 CPU (or maybe 8088)? Or are there differences between the two?
31
votes
2answers
5k views
How did people program for Consoles with multiple CPUs?
I'm specifically interested in the Sega Mega Drive/Genesis, which used a 68000 CPU, but also a Z80, mainly used to control the sound hardware and provide backward compatibility with the Master System.
...
4
votes
1answer
292 views
Did the 286 go out of its way to follow the 8088 bus protocol?
In general, different CPUs don't use the same bus protocol. A 16-bit CPU would not in general be expected to use the same protocol as an 8-bit CPU. For example, the 68000 would not be expected to use ...
3
votes
2answers
368 views
Test emulated 8080 CPU without an OS?
I've found a few 8080 CPU test suites available, but they all assume CP/M or a similar OS is already present and running - they call BDOS for I/O, etc. I'm working towards being able to run CP/M on my ...
13
votes
2answers
2k views
Why did some CPUs use two Read/Write lines, and others just one?
Many 8-bit processors, such as Motorola's 6800 and MOS Technology's 6502 make use of a single pin to indicate to the rest of the system whether the CPU wishes to read from or write to a memory ...
3
votes
3answers
276 views
3 decimal digits per 10 bits
Early computers often had hardware support for decimal arithmetic. This was usually in the form of BCD, 1 decimal digit per 4 bits, e.g. the 6502 and Z80, tightly constrained by transistor count as ...
12
votes
3answers
2k views
What was the first microprocessor to support full virtualization?
Virtual memory, which allows an operating system to run several machine code programs isolated from each other, came to the desktop during the eighties. But full virtualization, which lets the ...
21
votes
5answers
8k views
Will PC-DOS run faster on 4 or 8 core modern machines?
When I run PC-DOS on my 4 core AMD Phenom chip, does it take advantage of the extra parallel CPU's? If not, is there a way to coax DOS to use all available CPU's or does this require specific ...
4
votes
2answers
467 views
Starting a multi core CPU as single core [closed]
Is it possible to use a system with a modern, multi-core CPU with older operating systems that only support single core operation? Is this something that needs to be set in the BIOS? Does it depend ...
4
votes
1answer
262 views
List of Intel microchips
Where could I find a list of all of the microchips released by Intel, including microprocessors, Rams, roms, storage devices. Etc.
I have checked Wikipedia, and they have the processors, but not any ...
16
votes
1answer
2k views
How do accelerators and CPU cards work on the Apple II?
An Amiga 1200 exposes the entire CPU bus on the expansion port, so that an accelerator only needs to assert BR which causes the onboard CPU to stop all computation and electrically disconnect from the ...
8
votes
2answers
604 views
Instruction set support for multiplication with a constant
Before integer multipliers in silicon, several cpus had some support for multiplication. For instance SPARCv7 has the MULScc multiply-step instruction (several other cpus also have this).
As far as ...
11
votes
3answers
2k views
What was the first CPU with exposed pipeline?
Quoting from Programming for Performance exercise:
early versions of the MIPS processor had an "exposed pipeline" (that is, the assembly language programmer needed to know the latencies of ...
