Questions tagged [cpu]

For questions relating to CPU - central processing unit

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What is the most performant "32-bit only" x86 CPU? [closed]

I am thinking of building an era appropriate early/mid-2000s gaming PC. One requirement is that the CPU should not support x86-64 instruction set, only the 32-bit instructions can be used. My guess is ...
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Did any CPUs have a special instruction for multiplying or dividing by ten?

I recall reading about a CPU from the 90s which had, in addition to normal integer multiply and divide instructions, also had a special set of instructions for multiplying and dividing by ten. Does ...
billpg's user avatar
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What aspects of microprocessor ISAs have been patented?

A key objective of RISC-V was that every aspect of the ISA must be based on an expired patent. It was felt that this is the only truly reliable defense against patent lawsuits. It is surprising that ...
rwallace's user avatar
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13 votes
11 answers
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Did any 8-bit device ever merge a CPU core?

Looking at https://upload.wikimedia.org/wikipedia/commons/c/c1/Commodore-64-1541-Floppy-Drive-04.jpg I started thinking the following: There are too many chips in that drive. It is crying out for a ...
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14 votes
7 answers
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Which CPUs have implemented trap on signed integer overflow?

All mainstream microprocessors from the 4004 on, have implemented signed integer arithmetic with twos complement and silent wraparound on overflow (by which I mean that the CPU itself will not trap, ...
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3 votes
1 answer
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What do the pins D0-D7 on the Intel 8080 exactly signify?

I am currently trying to create a FPGA styled simulator of the 8080 in C. I have a couple of questions regarding the D0-D7 pins. As far as I can see the D0-D7 lines are used in order to store data (a ...
cdunku's user avatar
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4 answers
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How could early computers perform data operations before John von Neumann proposed the concept of ALU?

According to Wikipedia, John von Neumann proposed the Arithmetic and Logic Unit concept in 1945. Mathematician John von Neumann proposed the ALU concept in 1945 in a report on the foundations for a ...
Noob_Guy's user avatar
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19 votes
3 answers
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How much space did the 68000 registers take up?

The Motorola 68000 has 16 (somewhat) general-purpose registers of 32 bits each, a generous complement by the standards of its day. I would expect these to take a significant fraction of the die area. (...
rwallace's user avatar
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22 votes
3 answers
7k views

How could the Intel 4004 address 640 bytes if it was only 4-bit?

I am reading Computer Organization and Architecture, 10th ed. by William Stallings and I found this on page 26. where it says the addressable memory of 4004 is 640 bytes. But it appears that the ...
Noob_Guy's user avatar
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Who designed the ALi M1386SX core?

The ALi M1386SX is a 386 compatible microprocessor. I believe it was released around 1995, rather late for a 386 but since it was targeted at the embedded market (e.g. word processors and point-of-...
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Is it possible to raise the frequency of command input to the processor in this way?

In the 70's and 80's RAM chips worked at a lower frequency than the CPU. That is, the processor worked at a frequency higher than the RAM. We have that the CPU cannot receive one instruction from the ...
Alex's user avatar
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2 votes
1 answer
253 views

When were the RCA CDP1804, CDP1805, and CDP1806 introduced?

RCA produced follow ups to its 1802 CPU, the CDP1804, CDP1805, and CDP1806. What years did they become available to purchase in?
user's user avatar
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5 votes
2 answers
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Timeline for PowerPC CPUs from various manufacturers

I am trying to assemble a timeline of PowerPC series processors. It is complicated by the fact that there were multiple manufacturers. So far I have: IBM POWER 1990 POWER1 1992 RSC 1993 POWER2 1998 ...
user's user avatar
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4 votes
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How did Z8000 implement mul/div in few transistors with no microcode?

The Z8000 was Zilog's entry in the 16-bit microprocessor market; it was unsuccessful in large part, as I understand it, because it took too long to debug. According to https://thechipletter.substack....
rwallace's user avatar
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5 votes
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What were the release dates for the NEC V series CPUs?

I am trying to determine when the NEC V series CPUs became available. So far I have: 1982 µPD8088 1984 V20 ???? V40 ???? V41 1981 µPD8086 1984 V30 1988 V33 ???? V50 ???? V51 ???? V53 1986 V60 1987 ...
user's user avatar
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6 votes
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Who designed and manufactured the SA1 (RF5A123)?

The SA1 (also labelled RF5A123) is an enhancement chip for the Super Famicom/Super Nintendo. It is based on the 65C816, which the Super Famicom's main CPU (the Ricoh 5A22) is also based on. It seems ...
user's user avatar
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16 votes
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What was the release date of the MOS 8502?

I have been unable to find when the MOS 8502 was first released to customers. The process it was made on was available from 1979, but MOS don't appear to have used it for their own parts at that time. ...
user's user avatar
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17 votes
8 answers
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Why did they create PC games relying on a fixed CPU frequency instead of a clock function?

I know there have been computer games which rely on a fixed CPU frequency. Instead of a clock function they rely on the fact that the CPU needs some time to execute the code. But why did they do it? ...
javanerd's user avatar
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28 votes
8 answers
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Why was desktop CPU frequency so low in the late 1990s?

I think even in the 1990s it wouldn't have been a problem to build a 4GHz clock generator. Increase a transistor here and a resistor there and the clock rate will go up. (I know there was DECT in the ...
zomega's user avatar
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4 votes
0 answers
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Was the Game Boy CPU a completely new layout?

As explained on the Wikipedia Game Boy article and Is the Game Boy Sharp LR35902 object-compatible with the 8080/Z-80?, the Game Boy used a custom CPU that was fairly close to being a superset of the ...
rwallace's user avatar
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0 votes
1 answer
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What if ATX 12v P4 power connector was introduced 4 years earlier? [closed]

AT power supply handled +5 and +12 volts, +5 for ISA and processors, +12 for motors in disk drives. In 1995 486DX2 was introduced with 3.3V core, so it derived that from a simple but inefficient ...
Ivan Borsuk's user avatar
4 votes
1 answer
241 views

Was the S-83 Personal CP/M CPU used in commercial computers?

The June 1984 edition of Practical Computing magazine (page 43) refers to the American Microsystems Incorporated S-83 CPU as a Z80 compatible CPU with an 8K mask ROM capable of holding Digital ...
scruss's user avatar
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17 votes
3 answers
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When did the 386 overtake the 286?

The Intel 80386 was released in 1985, but was initially expensive, and took a long time to fully displace the earlier 80286 from the market; subjectively, I remember significant numbers of 286 ...
rwallace's user avatar
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3 votes
1 answer
262 views

Did using a PAL display mode for Amiga Workbench slow down an NTSC machine?

Inspired by this question about the CPU frequency when booting the Amiga in PAL vs NTSC, I'm curious if the CPU frequency was affected by using the other display mode. In other words, I used an ECS ...
bjb's user avatar
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6 votes
1 answer
643 views

How does POST memory test work on a relatively modern (2000s) PC? Does it still test every single byte like on older ones?

I have an Asus eee 4G (AMI BIOS), I want to ask if this product actually overwrites the entire RAM during cold boot. I have the "Quick boot" feature turned off and I can see the memory being ...
Hasbo's user avatar
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38 votes
4 answers
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What motivated stack being invented originally?

In the very early days (the earlier the better! Babbage maybe?) when something like a stack was developed, what motivated it originally? I am aware that these days it makes many features possible, ...
BipedalJoe's user avatar
-5 votes
2 answers
356 views

What are common instructions used to put the CPU into idle mode in the past? [closed]

I once did some tutorials on osdev.org and one interesting point was how the CPU is set into idle mode. Because when no task has work to do you want to put the CPU into idle mode and not consume any ...
zomega's user avatar
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9 votes
6 answers
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Would compare-and-branch have added an extra cycle on ARM-1?

The ARM-1 was an early RISC CPU, designed in 1986 (and even more typical of early RISC design constraints than the year would suggest, since Acorn didn't have the budget to pay for the latest process ...
rwallace's user avatar
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15 votes
4 answers
5k views

What was the last x86 processor that didn't have a microcode layer?

In the earlier days of microprocessors instructions were hard-wired, i.e. a particular instruction triggered circuitry that was mostly (if not completely) implemented for that instruction. I believe ...
bjb's user avatar
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8 votes
3 answers
2k views

Why was the size of the 1989 Intel i860 (aka 80860) memory bus 64bit?

On Wikipedia I have read the i860 from 1989 memory bus was at least 64bits wide. (It is the first CPU the Windows NT kernel was running on.) I think even 10 years later (1999) most desktop CPUs were ...
zomega's user avatar
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13 votes
2 answers
1k views

When did the natural number of branch delay slots become greater than 1?

Some early RISC CPUs had branch delay slots, the theory being that this would make the CPU both cheaper and faster; you could omit some interlock circuitry, and at the same time, in some cases, ...
rwallace's user avatar
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27 votes
5 answers
5k views

Did underclocking the early Z80 chips improve yield?

The Z80, one of the most successful and well-known of the 8-bit microprocessors, was released in July 1976 at an initial clock speed of 2.5 MHz. The TRS-80 Model I, released the following year, is ...
rwallace's user avatar
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11 votes
5 answers
3k views

Why does MOS 6502 require an external clock if it has an internal oscillator?

I have a trouble understanding how the MOS 6502 clock works. Possibly due to my extremely low knowledge regarding electronics in general. According to the Wikipedia: MOS would introduce two ...
Andy's user avatar
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17 votes
2 answers
2k views

Why would installing a 486DX2 make the system freeze for minutes on boot?

In the mid-1990s, a friend of mine had one of those Compaq Presario desktop PCs that had an integrated CRT SVGA display built in the same cabinet as the CPU, in a similar fashion as the early iMacs. ...
mkay's user avatar
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-4 votes
1 answer
248 views

Can someone clear up principles of CPU caching and pipelining simply and precisely? [closed]

I am asking this here because from the history the principles might become much clearer than looking at the latest and greatest CPUs. Of course I know that "cache speeds up memory access" ...
Gunther Schadow's user avatar
14 votes
2 answers
1k views

Resources about 1980s GPCPU video controller designs

Reading about the Fujitsu Micro 7, I found out that it used a pair of 6809 microprocessors: one as main CPU and one as graphics processor. That made me remember that when running old arcade games with ...
airman's user avatar
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20 votes
4 answers
6k views

Does any computer resemble the model taught in UK secondary education?

In UK secondary education, there's a model called the fetch-execute cycle, which describes how computers work. (See: Isaac CS; Bitesize GCSE, Higher; Teach CS.) As I understand it: The processor has ...
wizzwizz4's user avatar
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-5 votes
1 answer
456 views

If I build a new CPU architecture, how would an OS like Linux know how to run it? [closed]

I am trying to build a CPU from scratch (from NOR gates) in an emulator first, then on breadboard. (Inspired by nand2tetris and Ben Eater) Just trying to understand how things work. Now, as my CPU ...
Palash Kanti Kundu's user avatar
8 votes
1 answer
745 views

How does the VIC-II/CPU memory access work on the C64?

As a programmer I knew that on the C64 the CPU got the bus in the high phase of PHI2 and the VIC-II got it in the low phase and also stole extra high phases when required. However, it wasn't until ...
Robin Elvin's user avatar
14 votes
3 answers
3k views

When was the 6502 second sourced?

According to https://en.wikipedia.org/wiki/Second_source MOS Technology licensed Rockwell and Synertek to second-source the 6502 microprocessor and its support components. This makes sense; the 6502 ...
rwallace's user avatar
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4 votes
1 answer
222 views

Why 8086/8088 has OF in a high Flags byte?

In 8086, OF is put not into low Flags byte as other flags but separated in the second (high) byte. This is followed then in all the x86 line. Beside the possible historical reasons, this looks highly ...
Netch's user avatar
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33 votes
4 answers
5k views

Why was manual branch suggestion abandoned?

Once pipelined CPUs became common, a common issue arrived as a result of taking the wrong branch of a conditional jump, and thus needing to flush the pipeline. As a result branch prediction mechanisms ...
Badasahog's user avatar
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12 votes
2 answers
3k views

How did the CP1600 CPU supposedly make looping faster?

I came across an Intellivision in a box of stuff. When I looked it up on Wikipedia, it said that it uses a CP1600 that is based off a PDP-11. There's a weird entry on the wiki page: CP1600 did not ...
b degnan's user avatar
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7 votes
1 answer
389 views

What CPU architecture was first to implement 'inverted borrow' carry flag during subtractions?

Background In two's complement arithmetics, if one wants to calculate a subtraction having only an adder that calculates {cout,result}=full_adder(arg1,arg2,cin), where cin and cout are incoming and ...
lvd's user avatar
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8 votes
2 answers
459 views

What is the relation between external clock and internal states in the 68000?

(I'm assuming a memory cycle of 500 ns, without wait states.) According to the 68000 bus diagram, there are 4 CPU cycles for a memory cycle, so an external frequency of 8 MHz. However, things are ...
airman's user avatar
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25 votes
4 answers
3k views

Do instruction exercisers exist for 8086 and 68K (and other) CPUs?

For some of retroCPUs there exist exhaustive instruction exercisers, i.e. programs that are capable of catching the implementation errors when run on the emulator under development or on the newly ...
lvd's user avatar
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19 votes
1 answer
2k views

What are the screws for on the UltraSPARC?

I fail to grasp what can be screwed on them, can you explain what are these for?
Eric Cartman's user avatar
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0 votes
2 answers
490 views

Z80 - "LD (nn), dd" command cycle [closed]

For a university assignment, I have to describe and draw the command cycle of the LD (nn), dd command. To be exact, I was given this command: LD (0x1000), BC which I interpret as putting the low ...
nooblet's user avatar
1 vote
1 answer
420 views

8088 CPU A16-A19 address lines go crazy with nop test after 0FFFF address

I'm building a minimal, minimum mode 8088 computer. I started with an 80C88-2 (CMOS, static variant) CPU. My configuration is really simple. One CPU, one 74HCT245 (DTR->DT/R) for the data lines, ...
Pethical's user avatar
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2 votes
2 answers
502 views

How were the popular CPUs of the eighties implemented? [closed]

With the ubiquity of FPGAs, I find it relatively easy to design an eighties-like CPU. But it's maybe too simple now, with so many ways to implement any given CPU unit. What were the hardware ...
airman's user avatar
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