Questions tagged [cpu]

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76
votes
9answers
11k views

Why is the processor instruction called "move", not "copy"?

Many processors have an instruction called "move" (sometimes spelled MOV) which copies data from one location (the "source") to another (the "destination") in registers and/or memory. It does not do ...
54
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8answers
9k views

Why didn't early single-chip CPUs support multiplication instructions

Early single-chip silicon CPUs like the Zilog Z80 or MOS 6502 did not have a multiply instruction at all. Was this because the technology did not exist at the time to implement it, was it too ...
38
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1answer
3k views

Z80 CPU address lines not stable

I just got a Z84C0020PEC and wired it up to test it, using this circuit: Except that I've added LEDs to A0 through A9. It appears that A0 through A6 operate correctly, but A7 though A9 (I've not ...
34
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4answers
8k views

How much did IBM save by limiting the PC to 4.77 MHz?

My understanding is the CPU clock speed on the Intel 8088 in the IBM PC was selected as 4.77 MHz to simplify the design of the system. This despite the 8088 coming in two versions - 5 MHz and 8 MHz. ...
34
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2answers
2k views

Can the two CPUs in a Commodore 128 run at the same time?

The Commodore 128 has two CPUs. One is some variant of the 6502, and the other is a Z80. One CPU is there for compatibility with the Commodore 64 and the other is there presumably to give basic ...
33
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8answers
8k views

Does the industry continue to produce outdated architecture CPUs with leading-edge process?

Intel has named the i7-8086K in honor of the 8086 processor, though itself it is a 64-bit processor. And we still see in embedded systems or MIL-SPEC platforms there are old CPUs like the 80386 ...
33
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2answers
5k views

Can an x86 CPU running in real mode be considered to be basically an 8086 CPU?

When an x86 CPU is running in real mode, can it be considered to be basically an 8086 CPU (or maybe 8088)? Or are there differences between the two?
33
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4answers
5k views

Why was manual branch suggestion abandoned?

Once pipelined CPUs became common, a common issue arrived as a result of taking the wrong branch of a conditional jump, and thus needing to flush the pipeline. As a result branch prediction mechanisms ...
33
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2answers
6k views

How did people program for Consoles with multiple CPUs?

I'm specifically interested in the Sega Mega Drive/Genesis, which used a 68000 CPU, but also a Z80, mainly used to control the sound hardware and provide backward compatibility with the Master System. ...
31
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4answers
9k views

Intel CPU bug in the '90s

My teacher who teaches "Logic" at the university told us a story about Intel processors, which goes: In the '90s Intel had a bug in the calculation of mathematical functions like sin/cos ...
29
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8answers
10k views

Why did post-8008 CPUs not keep the on-chip stack idea?

Ken Shirriff writes in his blog entry about the 8008: The 8008's seven registers are in the upper right. In the lower right is the address stack, which consists of eight 14-bit address words. ...
27
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3answers
6k views

Why did Intel abandon unified CPU cache?

When Intel introduced the 80486 in 1989, they included their first on-chip cache, ostensibly to compete better with Motorola, who had been including on-chip caches for 5 years (MC68020, 1984). Unlike ...
25
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4answers
3k views

Do instruction exercisers exist for 8086 and 68K (and other) CPUs?

For some of retroCPUs there exist exhaustive instruction exercisers, i.e. programs that are capable of catching the implementation errors when run on the emulator under development or on the newly ...
24
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3answers
2k views

How was the 80186 incompatible with the IBM PC?

According to https://en.wikipedia.org/wiki/Intel_80186 The 80186 would have been a natural successor to the 8086 in personal computers. However, because its integrated hardware was incompatible with ...
23
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7answers
5k views

What was the last non-monolithic CPU to come to market?

This answer to the question "What was the rationale behind 36 bit computer architectures?" makes the point that early computers were assembled by hand, rather than having central processing ...
22
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2answers
6k views

What was the last x86 CPU that did not have the x87 floating-point unit built in?

This Wikipedia page says the following: Most x86 processors since the Intel 80486 have had these x87 instructions implemented in the main CPU So the above quote implies that some CPUs that were ...
21
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5answers
8k views

Will PC-DOS run faster on 4 or 8 core modern machines?

When I run PC-DOS on my 4 core AMD Phenom chip, does it take advantage of the extra parallel CPU's? If not, is there a way to coax DOS to use all available CPU's or does this require specific ...
21
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1answer
1k views

MOS 8502, just a 6510B?

I'm looking over what little I can find on the 8502, and from what I can see it appears to be a 2 MHz version of the 6510 with an extra I/O pin. Much ado about the speed, but the Atari's 6502B's were ...
20
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7answers
17k views

What does the "x" in "x86" represent?

I have read the following in the x86 Wikipedia page: The term "x86" came into being because the names of several successors to Intel's 8086 processor end in "86", including the 80186, 80286, 80386 ...
20
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2answers
7k views

Why did Socket 3 have more pins than needed for the 486?

Intel's Socket 3, used for 486 processors, was a 19×19 pin grid array socket. However, all compatible processors, to my knowledge, used 17×17 PGA packages. What was the point of the extra pins around ...
19
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4answers
5k views

Were there any 8-bit CPUs with 24-bit addressing?

Or was that something that didn't appear until later CPUs (around the time of the 286 maybe)? Also, how would I go about researching this on my own? It's not exactly something I can look up on ...
19
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1answer
2k views

What are the screws for on the UltraSPARC?

I fail to grasp what can be screwed on them, can you explain what are these for?
16
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2answers
1k views

DEC Alpha: why no 8/16-bit load/stores?

The first version of the DEC Alpha had no load/store instructions for 8 or 16-bit values; if you wanted to deal with data of such sizes, you had to do it by shifting and masking values in registers as ...
16
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1answer
2k views

How do accelerators and CPU cards work on the Apple II?

An Amiga 1200 exposes the entire CPU bus on the expansion port, so that an accelerator only needs to assert BR which causes the onboard CPU to stop all computation and electrically disconnect from the ...
15
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2answers
3k views

Why did some CPUs use two Read/Write lines, and others just one?

Many 8-bit processors, such as Motorola's 6800 and MOS Technology's 6502 make use of a single pin to indicate to the rest of the system whether the CPU wishes to read from or write to a memory ...
14
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5answers
3k views

Does the Intel 8086 CPU have user mode and kernel mode?

Does the Intel 8086 CPU have user mode and kernel mode as modern CPUs do? and if it doesn't have user mode and kernel mode, does that mean that any user program written for the Intel 8086 CPU could do ...
13
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7answers
5k views

Does the Intel 8085 CPU use real memory addresses?

The Intel 8086 CPU uses memory segmentation, which means that when, for example, you write the value 123 to the memory address 1001, the memory address 1001 will actually get converted first into ...
13
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5answers
1k views

Has there ever been a instruction set architecture that did not require instruction decoding at all?

I am studying basic principles of instruction set architectures and am considering what it would take to not have any instruction decoding at all. I.e., all the control lines of the computer would be ...
13
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3answers
3k views

When was the 6502 second sourced?

According to https://en.wikipedia.org/wiki/Second_source MOS Technology licensed Rockwell and Synertek to second-source the 6502 microprocessor and its support components. This makes sense; the 6502 ...
13
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1answer
2k views

Intel processor transistor type evolution

The Intel 4004 used MOS (metal–oxide–semiconductor) transistors. What has been the transistor types used in Intel processors onwards from the 4004 to 8085 to the x86 family of instruction set ...
13
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3answers
3k views

What was the first CPU with exposed pipeline?

Quoting from Programming for Performance exercise: early versions of the MIPS processor had an "exposed pipeline" (that is, the assembly language programmer needed to know the latencies of ...
13
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4answers
1k views

How did 2-chip CPUs work?

The 1970s saw a big transition from CPUs built from thousands of discrete components, to CPUs implemented on a single chip, with the occasional use of bit-slice components along the way. There were, ...
12
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6answers
5k views

Did any RISC CPU ever take more than one clock cycle per instruction?

Classic RISC CPUs like ARM and MIPS basically offer the trade-off: simple instruction set, but instructions execute in one cycle for good overall performance. (It gets more complicated in later times, ...
12
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3answers
2k views

What was the first microprocessor to support full virtualization?

Virtual memory, which allows an operating system to run several machine code programs isolated from each other, came to the desktop during the eighties. But full virtualization, which lets the ...
11
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2answers
665 views

Performance of the Rekursiv

I happened to find out about the Rekursiv today. Rekursiv is a processor that attempted to implement OOP concepts directly at the hardware level. Since it never got fully developed, I wonder what ...
11
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1answer
1k views

How did the Zip Chip and RocketChip accelerators work for the Apple II?

Though there is already a similar question on the site, this one is more specific to these chips and their technical implementation. There were two accelerators for the Apple II series that were drop-...
10
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2answers
2k views

How did the CP1600 CPU supposedly make looping faster?

I came across an Intellivision in a box of stuff. When I looked it up on Wikipedia, it said that it uses a CP1600 that is based off a PDP-11. There's a weird entry on the wiki page: CP1600 did not ...
9
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6answers
3k views

Is there any music source code for sound chips? [closed]

I’ll clarify what I mean. The sound chip (c64's SID, spectrum's Yamaha, etc.) is connected either to the input / output port, which will be reserved for the sound chip, or directly to the CPU data bus....
9
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3answers
2k views

Did multiplexed address/data lines make memory access slower?

Looking at the pinout of e.g. the 8088, it multiplexes the data lines onto eight of the address lines; presumably the designers judged that being able to squeeze the chip into a 40-pin package, would ...
9
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4answers
1k views

Why did later CPUs use microcode instead of PLA's?

If you look at a die photo of a 6502, about forty percent of the chip is taken up by what's obviously microcode, both by its regular structure and by the obvious need for such from the instruction set,...
8
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2answers
769 views

Instruction set support for multiplication with a constant

Before integer multipliers in silicon, several cpus had some support for multiplication. For instance SPARCv7 has the MULScc multiply-step instruction (several other cpus also have this). As far as ...
7
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5answers
690 views

Could the Intel 8086 CPU have many segments in memory of the same type?

The Intel 8086 CPU could address up to 1 MB of memory using segmentation, and this CPU have 4 segment registers, which are CS and SS and DS and ES. Each segment in memory can have a maximum size of ...
7
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2answers
773 views

What was the first microprocessor to overlap loads with ALU ops?

Modern out of order CPUs can do all sorts of things in parallel, having not only multiple functional units, but a lot of logic to check at runtime exactly which instructions really depend on others, ...
7
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1answer
1k views

Did any CPU ever expose load delays?

There have been CPUs with exposed branch delays, such as early MIPS: What was the first CPU with exposed pipeline? (Later MIPS kept the delay slots from the early MIPS, though by that time, it wasn't ...
7
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2answers
268 views

What is the relation between external clock and internal states in the 68000?

(I'm assuming a memory cycle of 500 ns, without wait states.) According to the 68000 bus diagram, there are 4 CPU cycles for a memory cycle, so an external frequency of 8 MHz. However, things are ...
6
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2answers
857 views

GPU chip implementation on CPU - will it be faster? [closed]

So, modern video cards include two devices - a video signal generator and a graphic accelerator. The first of them converts data from video memory into MDA / CGA / VGA / RCA / DVI / HDMI / etc format....
6
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1answer
230 views

When was term "word" first used as reference to CPU max register size

I've tried to find information when term 'word' was firstly used. And it seems that even ENIAC used this term. Is it safe to say that term 'word' was invented with ENIAC?
6
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2answers
295 views

Why was the maximum byte size of 8 bits on IBM 7030?

As far as I know, IBM 7030 used term byte. But this byte was just an imaginary term to make easier for our brain to work with bits. So it had nothing in common with a physical realization of the CPU. ...
6
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2answers
408 views

8 registers in the 9440?

Looking over the 9440 spec sheet, a question arises. The very first line notes that it has eight registers... eight? There's the four AC's, PC, carry bit (all 16-bits for that one!) and... what? On ...
6
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1answer
703 views

Modern Alternative to Malvino's Digital Computer Electronics

For those who want to study retro computing in depth, starting by understanding 74xxx logic and CPU design is (IMHO), one of the best paths there is. Malvino's "Digital Computer Electronics" (DCE), ...