Questions tagged [instruction-set]

For questions regarding the instruction sets of microprocessors.

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Why is the processor instruction called "move", not "copy"?

Many processors have an instruction called "move" (sometimes spelled MOV) which copies data from one location (the "source") to another (the "destination") in registers and/or memory. It does not do ...
JoelFan's user avatar
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63 votes
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How does the LOADALL instruction on the 80286 work?

This undocumented instruction existed in the 80286 and, I believe, the 80386. I think it was added while debugging the chip, so the engineers could quickly put the processor into any state and test it ...
mcleod_ideafix's user avatar
52 votes
4 answers
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What did the 8086 (and 8088) do upon encountering an illegal instruction?

Preface: This question does in part intersect with Use of undocumented opcodes, but targets especially the 8086 instruction handling. I was reading Tanenbaum's "Operating Systems, Design and ...
Joe D's user avatar
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50 votes
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Why did the PDP-11 include a JMP instruction?

The PDP-11's program counter was addressable in two ways: as a general purpose register or as a memory location. Still, the PDP-11's instruction set included separate instructions for moving a new ...
Omar and Lorraine's user avatar
49 votes
2 answers
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How did the Z80 instruction set differ from the 8080?

The Zilog Z80 microprocessor, known for its use in the ZX Spectrum, was designed to be a backwards-compatible extension to the Intel 8080 processor. It introduced several new instructions to the 8080'...
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48 votes
4 answers
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Why are first four x86 General Purpose Registers named in such unintuitive order?

On x86 the first four general-purpose registers are named AX, CX, DX, BX. It would be quite intuitive if their indices (those used in instruction encoding) were in alphabetical order, but instead of ...
Ruslan's user avatar
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47 votes
6 answers
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Why does the 6502 have the BIT instruction?

The 6502 has a bit instruction which copies two of the bits into the N and V flags, pretends to and the byte with the accumulator, but discards the result and only affects Z. I'm having a hard time ...
Omar and Lorraine's user avatar
47 votes
3 answers
6k views

What happened to the SEV instruction on the 6502?

The 6502 has a group of opcodes which copy bit 5 from the opcode into one of the status flags. (I know it's not implemented this way, but it looks as though the bit fields are: 2 bits to select the ...
Omar and Lorraine's user avatar
45 votes
8 answers
5k views

Executable ASCII files before x86?

I've known about a technique allowing to bootstrap arbitrary 16-bit x86 code from a subset of instructions representable as printable ASCII bytes since the early 1990s. The first example of an ASCII ...
Leo B.'s user avatar
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40 votes
4 answers
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Did any processor implement an integer square root instruction?

Has any processor ever implemented an integer square root instruction? Obviously, floating-point square root instructions are quite common, but I've never seen one specifically for integers. One close ...
v-rob's user avatar
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38 votes
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How did the 8086 interface with the 8087 FPU coprocessor?

The 8087 has many instructions - too many, it seems, to be encoded as part of the 8086 instruction set. How did the Intel 8086 interface with an Intel 8087 FPU that a user added? Consider the ...
Jet Blue's user avatar
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33 votes
2 answers
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What is the relative code density of 8-bit microprocessors?

When RAM is at a premium, as it was in the old days, a greater code density of an instruction set can be a substantial advantage. (Click saver: Code density refers loosely to how many microprocessor ...
Leo B.'s user avatar
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32 votes
6 answers
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Why does the Z80 include the RLD and RRD instructions?

The Z80 has an instruction RLD, which apparently treats the lower 4 bits in the accumulator and the full 8 bits in (HL) as a twelve bit integer which it then rotates left by 4 bits. The carry flag ...
Omar and Lorraine's user avatar
31 votes
4 answers
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What motivated the weird boolean instruction repertoire of the PDP-11?

The PDP-11 has seven dyadic instructions (I'm not counting the byte/word varieties separately), which take a full six bits for each of its operands. That's twelve bits to specify the operands, and ...
Omar and Lorraine's user avatar
29 votes
3 answers
4k views

Why does an instruction include the address of the next instruction on the IBM 650?

The IBM 650 seems to be a load-store machine. One advantage of a load-store machine is that the instruction can be shorter because there's less pressure to pack more information into it. But the IBM ...
Omar and Lorraine's user avatar
25 votes
2 answers
4k views

Was leaving all xxxxxx11 opcodes unused on the 6502 a deliberate design choice?

The 6502, like many 8-bit processors, has a somewhat arcane opcode-mode restrictions. On most such processors, the restriction is a clear result of trying to pack a lot of instructions into a limited ...
supercat's user avatar
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Reconstruct the loop from "The Story of Mel"

From Ed Nather's hacker-epic "The Story of Mel" (using the original paragraph-formatting to save space in this question): The firm manufactured the LGP-30, a small, cheap (by the standards ...
Quuxplusone's user avatar
24 votes
4 answers
4k views

Why are branches relative in many 8-bit CPUs?

I was looking over an old article on the 6809 and was perusing the opcodes and noticed that the branch instructions came in two flavors, long and short. That sparked a memory about one of the 6502-...
Maury Markowitz's user avatar
22 votes
5 answers
2k views

PDP-11 instruction set inconsistencies

The wiki page PDP-11 architecture has a cryptic paragraph with no references or examples: Inconsistent instructions Over the life of the PDP-11, subtle differences arose in the implementation of ...
Leo B.'s user avatar
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22 votes
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When did the IBM 650 have a "Table lookup on Equal" instruction?

In 1959, Donald Knuth wrote an assembly program named SuperSoap for the IBM 650. Here is the manual, and here is a listing of the program (in SuperSoap assembly language). Quoting from the abstract: ...
texdr.aft's user avatar
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21 votes
8 answers
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Uses for the halt instruction?

What was the halt instruction in early CPUs such as the Z80 and 8080 used for? Here's a description of the Z80 instruction: The HALT instruction suspends CPU operation until a interrupt or reset ...
Jet Blue's user avatar
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20 votes
8 answers
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Why does the x86 not have an instruction to obtain its instruction pointer?

This has always confused me. Why can you not directly obtain the IP, and instead have to go through some odd assembly hoops such as calling a function whose only purpose is to push its own return ...
Michael Stachowsky's user avatar
19 votes
7 answers
4k views

Have there been any instruction sets with an odd register width?

Did any early instruction sets have an odd integer register width? The reason I am asking is because all of the instruction sets I have read about (on this site and elsewhere) have had an even general ...
Qaziquza's user avatar
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1 answer
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How did the 6502 ALU perform a decrement?

Assuming that this diagram is correct: Instructions like INC, INX, and INY can easily perform increment using ALU sum with data on B input, 0 on A input and carry_in set. But how do instructions like ...
Johnmph's user avatar
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19 votes
1 answer
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How did the Motorola MC68030 and MC68040 come to have the powerful and expensive CAS2 instruction?

The CAS2 instruction - double compare-and-swap - is an extremely powerful instruction that was coveted for quite awhile (and still is, really) for making lock-free and wait-free data structures - that ...
davidbak's user avatar
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19 votes
3 answers
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What is the history of the PDP-11 MARK instruction?

The PDP-11 MARK instruction was intended to be used as part of the standard PDP-11 subroutine return convention. MARK facilitated the stack clean up procedures involved in subroutine exit. To use it, ...
Leo B.'s user avatar
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18 votes
3 answers
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Are the 6809 and 6809E different from a programmer's point of view?

I can see the pinouts of these two chips are utterly different. Apparently the 'E needs an external clock as well. This question isn't so much about any of those hardware related differences. This ...
Omar and Lorraine's user avatar
18 votes
1 answer
3k views

Which undocumented 8085 instructions is Steven Morse referring to in "In The Beginning"?

In S. P. Morse's 1980 allegory, "In The Beginning", he writes And Intel said, "Let there be an 8085 with an oscillator on the same chip as the processor, and let an on-chip system controller ...
Evan Carroll's user avatar
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What is the instruction set of the PDP-7?

The PDP-7 was a bookshelf-sized "minicomputer", with keyboard, magnetic and paper tape and printer I/O. According to Wikipedia, the first version of UNIX (then named Unics) was programmed in assembly ...
wizzwizz4's user avatar
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17 votes
4 answers
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Why are PDP-7-style microprogrammed instructions out of vogue?

DEC, and at least some of their computers, especially those in the 18-bit family and 12-bit family, had these opr instructions, which contained many bitfields which encoded something like "...
Omar and Lorraine's user avatar
17 votes
5 answers
2k views

Has there ever been a instruction set architecture that did not require instruction decoding at all?

I am studying basic principles of instruction set architectures and am considering what it would take to not have any instruction decoding at all. I.e., all the control lines of the computer would be ...
Gunther Schadow's user avatar
16 votes
3 answers
988 views

Why did instruction sets since the late 1970s seemingly stop including an "execute" instruction?

Many mainframe instruction set architectures (ISAs) in the 1960s included an Execute instruction, which would treat data as an instruction. I haven't found an architecture designed after 1976 which ...
Stavros Macrakis's user avatar
16 votes
1 answer
1k views

Why does the Z80 not have EX DE, IX?

Reading Decoding Z80 Opcodes, There's a section about the 0xDD prefix. This instruction prefix causes the next instruction to use the IX register instead of the HL register. That makes sense. HL and ...
Omar and Lorraine's user avatar
16 votes
1 answer
1k views

How were Zuse Z22 Instructions Encoded?

The title says it all: How to En-/Decode Z22/Z23 Instructions? (History and Linkage: The question was raised by Wilson in a comment on my answer to his question "Why are PDP-7-style microprogrammed ...
Raffzahn's user avatar
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15 votes
1 answer
2k views

What are the "ports" used via IN/OUT, vs. the PEEK/POKE address space?

This is something of a followup to How much control of TRS-80 Model III disk drives was possible from its Cassette (ROM) BASIC? but on a more general topic: I know that PEEK and POKE enable direct ...
natevw's user avatar
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15 votes
2 answers
1k views

Null-terminated strings on the PDP-7?

I came across a post that states that Unix uses null-terminated strings, ASCIZ, because it was a feature of the PDP-7. This triggered my reading on the CIS instructions in the PDP-11, but these were ...
Maury Markowitz's user avatar
15 votes
1 answer
989 views

What are the added opcodes for MC6801/MC6803?

What new opcodes were added to Motorola MC6801/MC6803? Background for the question, and what I've figured out so far (correct me if I'm wrong): The Motorola MC6801 (and MC6803) had an "enhanced ...
tobiasvl's user avatar
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14 votes
4 answers
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Are there any articles elucidating the history of the POPCOUNT instruction?

Figuring out how many bits in a group of bits are set to 1, known as computing "population count", Hamming weight, or "bit summation", among others, has various applications. It is also fairly cheap ...
Leo B.'s user avatar
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14 votes
2 answers
603 views

What is the purpose of the "difference of absolute values" instruction?

The IBM NORC computer, among others, had an arithmetic instruction computing the difference of the absolute values of its operands (|x|-|y|, see NORC Programming Manual, page 11, opcode 28), which ...
Leo B.'s user avatar
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14 votes
2 answers
2k views

Origin of "arithmetic" and "logical" for signed and unsigned shifts

The assembly language for many processors use the phrase "arithmetic shift" to represent the bitwise shift of a signed value, and "logical shift" for an unsigned value. The two ...
DrSheldon's user avatar
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14 votes
1 answer
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Nintendo 64 microcode format

The Nintendo 64 GPU ('Reality Coprocessor') had microcode that could be loaded at runtime. Several standard microcodes were supplied with the development kit, and the easily findable documentation ...
rwallace's user avatar
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13 votes
0 answers
587 views

Original instruction set for the first ARM processor

I'm studying ISAs and would really like to see the very first ISA that Sophie Wilson chose/put together when designing the very first ARM CPU while at Acorn Computers around 1983 or so. From what I ...
dvanaria's user avatar
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12 votes
3 answers
974 views

How to keep the instruction prefetcher filled up

My understanding is that the Intel 8088 has this buffer which reads ahead in the instruction stream whenever it has a spare bus cycle or two, so that when the time comes to execute that instruction, ...
Omar and Lorraine's user avatar
12 votes
1 answer
988 views

Carry handling during address generation on a 6502

I'm trying to learn a bit more about the internal workings of the 6502. The manual says that the branch instructions do not affect the carry flag. However, my understanding is that some carry handling ...
Patrick LeBoutillier's user avatar
12 votes
1 answer
557 views

Ratio of code density between 8080 and Z80

The Z80 was (except for a handful of tiny incompatibilities) a superset of the 8080, adding a number of new instructions as well as the alternate register set. It seems therefore that it must have at ...
rwallace's user avatar
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12 votes
3 answers
1k views

What is the instruction set of the Z4?

I am able to find a few instructions, such as: Fin (presumably "Fine", as in the end of a musical score, ends a program), Fin', (a conditional Fin), St (possibly "Start" -- the need for this is ...
Omar and Lorraine's user avatar
11 votes
6 answers
2k views

Was there a Western computer with blatantly missing instructions in the instruction set?

In the BESM-6, there is an instruction (045) to add index registers, but not to subtract them, however, there is a nearby unused opcode 047, which is made synonymous to 045 (in fairness, that's true ...
Leo B.'s user avatar
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11 votes
3 answers
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Behavior of the zero and negative/sign flags on classic instruction sets

It seems to me that there's effectively two ways that the zero bit could work. Z is set iff the result of a computation is mathematically equal to 0. Z is set iff a bit pattern consisting entirely of ...
junius's user avatar
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11 votes
3 answers
1k views

Was the PDP-11 coroutine instruction actually used?

In a typical description of the coroutine mechanism it usually mentioned that the PDP-11 instruction set provided a way to effect the coroutine switch by a single instruction, namely JSR PC,@(SP)+. ...
Leo B.'s user avatar
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11 votes
2 answers
1k views

What is the purpose of the ω register of the БЭСМ-6?

This page describing the БЭСМ-6 instruction set refers to a value called ω, which is stored inside a Mode Register. It appears to be set by certain kinds of instructions, so that ω can tell you which ...
Omar and Lorraine's user avatar