Questions tagged [io]
The io tag has no usage guidance.
10
questions
13
votes
2answers
2k views
If a PS/2 device on a 32-bit x86 sends a byte to the IO port 0x60 and you read it, what happens next?
I'm writing a hobby OS and the first thing I want to do is access PS/2 devices (it's a somewhat legacy, 32 bit OS, so I figured it's relevant to ask here?).
I can see my PS/2 devices and I want to ...
6
votes
2answers
379 views
Flash border color during Kernal LOAD routine
I would like to use the Kernal's LOAD routine to load a file into memory, because that seems to be the easiest way to do it. However, that LOAD call is synchronous in the sense that it returns once ...
9
votes
1answer
2k views
Is this a bug or an allowed Pascal behavior?
Consider the following Pascal program:
1 1 PROGRAM MAIN(OUTPUT); VAR F:TEXT; I:INTEGER;
2 2 BEGIN
3 2 REWRITE(F);
4 3 FOR I := 10 TO 30 DO BEGIN
5 3 WRITELN( I, ’...
1
vote
1answer
125 views
What kinds of input/output devices could the Electrologica X1 interface with (simultaneously)?
Here is a brief survey of the literature that I know of/have access to: The most complete description of the X1 that I am aware of is given in Dijkstra's 1959 PHD thesis, which describes in detail ...
4
votes
5answers
594 views
Are there any good resources on emulating/simulating early computing input/output?
Note: I hope this question is on topic. I'm not sure where else to put it.
There are several tutorials available online for writing emulators/simulators. Unfortunately they all seem to focus on ...
4
votes
3answers
2k views
8086 duration of program
I have the following assembly code for 8086
MOV AL, [BX]
OUT DX, AL
The bus clock frequency is 1MHz. Access to memory is done without WAIT, and to I/O with one WAIT tick. How I can calculate the ...
5
votes
1answer
388 views
Why is my program outputting only zeros to the data bus during I/O operations?
I'm building a breadboard Z80-based computer. As now, I have the CPU hooked up to an EEPROM and an I/O device (an HD44780 character display) with appropriate decoding logic.
The ROM chip starts at ...
2
votes
1answer
164 views
READY / WAIT when reading from / writing to IO ports
During the execution of an IN or OUT instruction (so after the opcode and its single-byte argument have been fetched from memory), how does the Intel 8080 react to its READY pin going down? Is it ...
7
votes
2answers
1k views
Did general purpose I/O controller chips come with fewer than 40 pins?
I'm aware that 40-pins was a high-water mark for dual-inline package chips for a significant time; many CPUs of the early 1980s (8086, Z80, 6800, 6502, etc) used 40-pin packages, but no larger.
...
15
votes
1answer
973 views
Why did POKEing ROM addresses mask port writes?
After reading mcleod_ideafix's answer about the Inves Spectrum+'s "randomize of death", specifically his article on the subject, one thing struck me as odd. From César Hernández Bañó's research:
......
