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Questions tagged [memory-layout]

For questions regarding the layout or mapping of memory in a retrocomputer.

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4
votes
2answers
631 views

Transforming a memory dump into something loadable

As a follow-up to this question, I now have: A memory dump of the unpacked application The start address of the application I can verify that the dump is correct by starting a new instance of Vice, ...
4
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2answers
363 views

How can I malloc() a block that's guaranteed to lie within a single DMA segment in Turbo C 2.01?

I'm following root42's videos about DOS programming using Turbo C 2.01. I've written my own Soundblaster 1.xx driver following the Creative Labs documentation, and I'm confused about memory allocation....
9
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2answers
228 views

Paradigm for (repeated) use of PDP-10 indirect bit

Answers to question PDP-10 effective address calculation explain how PDP-10 effective address calculation works, including potentially infinite indirections. However the answers don't address how this ...
16
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7answers
7k views

Did any computer use a 7-bit byte?

In an answer to Why did IBM System 360 have byte addressable RAM I wrote regarding the choice of byte size: 7 bits would be a perfect match for ASCII, but engineers would instinctively recoil from ...
4
votes
1answer
248 views

What is the memory layout in MS-DOS

I know that when an .COM file is loaded, DOS loads its contents into memory, sets the segment registers (CS, DS and SS) to point to the 64KB segment and then performs a jmp to the starting address. ...
6
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1answer
123 views

Details of ZS Scorpion port 0x1ffd

There's this page about the ZS Scorpion, and I'm reading about the way bankswitching works. Port 0x7ffd is the same as on western ZX Spectrums, but to double the amount of RAM to 256k and also the ...
8
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3answers
819 views

How can I access/use memory outside of the standard 1 MB address range of MS-DOS?

How do you access more memory (above the 1MB) in DOS if the 640KB of conventional memory are not enough? I have read a lot about this, but I couldn't figure out how to do this in actual code. Is ...
14
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2answers
2k views

How was a line of Commodore 64 BASIC code stored in its memory?

I am reading up on old C64 stuff and I am using the Vice emulator to play with it. Currently I am studying about how the C64 stored BASIC programs in RAM. This is quite clear (it starts on address $...
4
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7answers
458 views

Static memory partitioning

Does anyone know of any operating system that used static memory partitioning: contiguous physical memory allocation with one process per partition, one partition per process, partitions generated at ...
0
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2answers
842 views

In the Amstrad CPC's Mode 0, what was the design rationale for interleaving the pixel bits?

The following tables are modified and corrected from Painting pixels: Introduction to video memory. m-bit: memory bit p-bit: pixel bit Mode 2 - 640x200 (half width pixels), 2 colours m-bit | 7 | 6 |...
10
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1answer
577 views

Why did the Amstrad CPC use a nonlinear screen memory layout?

The screen memory layout on the Commodore 64 in bitmap mode was nonlinear - which incurred a penalty in development time, code size and speed for games using it - because when designing the VIC-II, ...
15
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1answer
1k views

What are the “ports” used via IN/OUT, vs. the PEEK/POKE address space?

This is something of a followup to How much control of TRS-80 Model III disk drives was possible from its Cassette (ROM) BASIC? but on a more general topic: I know that PEEK and POKE enable direct ...
5
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2answers
2k views

How did the BBC sideways ROM software for the AMX mouse process the user port input data to determine x and y movement?

This mouse plugged into the user port on the underside of the BBC micro models. The mouse came with software in the form of a sideways ROM which provided APIs, CLI commands for own programs as well as ...
21
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1answer
3k views

How is memory allocated in Super Mario World?

Super Mario World (SMW) is known to have several bugs relating to re-use of memory for multiple purposes. For example some memory items are used for more than one type of item, and the designers are ...
5
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9answers
577 views

Were there any games/software that used memory beyond what was advertised available to BASIC on the machine?

Were there any games/software that used memory beyond what was advertised as available to BASIC on the machine ? On home / personal computers any time up to 1984 . Without needing to plug in any ...
3
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2answers
193 views

virtual addressing in device drivers

Sun's SBus is particular for having virtual addressing and address translation even for device drivers. Any other buss design which had this peculiarity ? Check out Ben Catanzaro's book The SPARC ...
12
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1answer
1k views

What manages Upper Memory Blocks (UMBs) in MS-DOS?

I had always assumed that EMM386.EXE was responsible for managing the Upper Memory Blocks - UMBs - the memory space between 640KiB and 1MiB in real mode x86. For example, on MS-DOS 6.22, help emm386....
5
votes
1answer
388 views

Can the Nintendo 64 run code directly from ROM?

I've read that the usual way to execute code on the N64 is to use DMA to copy it from ROM into RAM, and then run from RAM. However, it seems that the contents of the ROM are directly visible to the ...
10
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3answers
3k views

Disable memory refresh on Z80

Is there a software method of disabling memory refresh on the Z80? Or would it be acceptable to create a hardware method of disabling the address bus during the refresh cycle? If I switch off the ...
5
votes
3answers
478 views

How to use HGR2 (or HGR) on an Apple II

I am a big fan of the TV show lost, and I was trying to make the Dharma Initiative logo. But at certain point I couldn't add new lines of code and the final part of the logo was cut off. I tried to ...
9
votes
1answer
374 views

Why is the Interrupt Enable Hardware Register in the HRAM area on the Gameboy?

It's something I've always been wondering: Almost all of the hardware registers on the Gameboy are placed between $ff00 and $ff7f (with plenty of gaps and empty space), the HRAM is located between $...
28
votes
1answer
3k views

Did DOS zero out the BSS area when it loaded a program?

As an example, say we have a DOS MZ EXE file that's around 20 KiB in size. The EXE header contains the value 0x1400 at offset 0x0A indicating that the program is requesting 5,120 paragraphs (or 80 KiB)...
6
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5answers
482 views

Could the Intel 8086 CPU have many segments in memory of the same type?

The Intel 8086 CPU could address up to 1 MB of memory using segmentation, and this CPU have 4 segment registers, which are CS and SS and DS and ES. Each segment in memory can have a maximum size of ...
27
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3answers
6k views

Why did Intel abandon unified CPU cache?

When Intel introduced the 80486 in 1989, they included their first on-chip cache, ostensibly to compete better with Motorola, who had been including on-chip caches for 5 years (MC68020, 1984). Unlike ...
2
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3answers
185 views

Paging vs. segments in the Z8000

Having post-dated either, I came to understand the difference between paging and segmentation to be that the former refers to fixed blocks while the later can point anywhere. To do so, the segments ...
2
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2answers
153 views

ISA Extension cards using more than 64kB

Related to my previous question around VGA framebuffer being limited to 64kB I started to wonder if there was any extension cards (or similar) using more than 64kB of address space in linear fashion, ...
8
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3answers
1k views

Why VGA framebuffer was limited to 64kB window?

VGA framebuffer was fixed to 64kB at A0000h. Right after that there’s MDA/CGA framebuffer at B0000h. I am not sure, but I recall VGA did have to support CGA and its framebuffer, but was there any ...
9
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5answers
1k views

C64 cartridge emulation with ATmega

As a personal project I had the idea to create a custom cartridge for my Commodore 64 and use an ATmega 1284p microcontroller to emulate eproms and/or custom chips. Basically my idea is similar to ...
3
votes
2answers
1k views

IBM PC memory map - why RAM at the bottom?

The 8088 provided an address space of one megabyte. The IBM PC allocated that address space as 640K RAM (not that the 5150 could physically take that much, but the address space was allocated) ...
9
votes
1answer
575 views

Commodore Plus/4 60671 bytes free - how?

It is widely known that, while the Commodore 64 did indeed provide 64K of RAM for machine code programs, only 38K was usable from BASIC; this was because bank switching was needed to get at the rest, ...
4
votes
1answer
302 views

How is the 320x200x16 graphics mode mapped in the IBM PCjr?

I've read that the PCjr supports a 320x200 pixel mode with 16 colors. But what I can't seem to find is how much memory that takes, how it's organized (chars?) or where it's located in memory. I'm ...
1
vote
1answer
178 views

Does the TurboGrafX16 store switches and/or flags in RAM?

Based the the specs I found for the TG16, it has 8 KB of RAM. I also found notes in the documentation of many opcodes that there is data stored in several "flags and switches" are these stored in RAM ...
4
votes
2answers
277 views

PDP-10 effective address calculation

How does effective address calculation work on the PDP-10? My understanding is that the instruction code contains an 18-bit address or offset, one bit for indirect, and a register code that's 4 bits. ...
17
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5answers
2k views

Was 1991's Hellcats the first instance of incremental screen updates?

In case you have never seen it, 1991's Hellcats was a seminal release on the Mac. It ran at full 8-bit color and could, on a newish machine, drive three 1024x768 screens at the same time. Nothing on ...
57
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3answers
13k views

Who set the 640K limit?

We all know that "640K should be enough for everyone". But who actually set this limit? The quote is often attributed to Bill Gates, but it doesn't seem like a decision for an Operating System vendor ...
10
votes
1answer
662 views

Amiga 500+ rev8A, 1 MB chip RAM and 0.5 MB slow RAM

I have an 500+ rev8A, I added the missing 0.5 MB RAM and the U32 to the motherboard. I also have 512 KB in the trapdoor. This results in 1.5 MB chip RAM; but I want to have 1 MB chip RAM and 0.5 MB ...
17
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4answers
3k views

Why did the TI-99/4 have two databuses?

Wikipedia says on Russian page: Однако к 16-разрядной шине были подключены только 256 байт статической памяти и системное ПЗУ. Остальная память (ОЗУ) и периферийные устройства были 8-разрядными и ...
5
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3answers
480 views

How does the PMD 85 display colour or greyscales?

I stumbled across this computer in an article on hackaday, Home computers behind the Iron Curtain and since it has this bizarre resolution, I looked closer into it. Some claims from Wikipedia: ...
46
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8answers
9k views

Why didn't the 8086 use linear addressing?

The 8086 used a segmented memory architecture where the linear address was computed from a 16-bit segment number and a 16-bit offset. This greatly complicated things from a programming perspective. ...
5
votes
1answer
776 views

How does JSR actually work on the 65c816 CPU for the SNES (Super Nintendo)?

Take the following machine code for the 65c816 for the SNES (Super Nintendo): 00000000 ea ea 78 18 fb c2 18 a2 ff 1f 9a 20 fa 80 e2 20 |..x........ ... | 00000010 a9 80 8d 00 21 a9 e0 8d 22 21 ...
7
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1answer
865 views

How does Notepad store text files in memory?

Before I knew about line endings, I used to open small executables in Notepad and ruin them completely. However, some more complex executables (e.g. Paint Shop) were too big for Notepad, and I was ...
9
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2answers
1k views

Unused RAM Chips on x86 machines

On classic x86 machines the upper 384 KB of system memory contains video RAM and BIOS ROM Besides other things. Those areas overlay over conventional RAM, so that you can't use all upper memory, but ...
10
votes
2answers
992 views

Is all 100% of a 64k Apple II memory usable?

Are there any areas of the 64k RAM which are permanently unusable by anything, whether by the built-in monitor ROM or user programs? Looking at $C000-C0FF, this is the "softswitch" area, and as far ...
9
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2answers
555 views

Behaviour of $D000-$D3FF section on the C64 during bankswitching

My question is about bankswitching behaviour on the Commodore 64. I'm writing a C64 game for a 16kb cartridge with EXROM and GAME pulled low, so the available bankswitching modes are (according to ...
3
votes
1answer
319 views

Can the BBC Master co-processor execute a program in the I/O processor's memory?

Whilst researching the 65C102's memory layout, it occurred to me that, since the I/O processor's memory is mapped to 0xFFFFxxxx, it might be possible to store code there and execute it by setting the ...
26
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2answers
3k views

How did an IBM 5150 with 16KB RAM work?

I keep reading that when it was first released, there was a variant of the IBM PC model 5150 that had only 16KB of RAM installed. From a hardware perspective, this would clearly work - the 5150 ...
11
votes
1answer
1k views

Why are some soft switches on the Apple II only triggered with a write?

The Apple II uses memory mapped I/O and soft switches to do many things. One thing has confused me though: why are some soft switches only activated when written to? For example, 80COLON ($C00D) and ...
20
votes
1answer
2k views

How to check the C64 graphics mode used by Maniac Mansion

I have been investigating the MS-DOS port of the C64's Maniac Mansion game. The original MS-DOS port used the C64-specific character map to draw the various backgrounds in the game. I noticed that ...
11
votes
5answers
3k views

Mapping more than 64kb of address space

I'm planning out a 6502 homebrew build but seem to be stuck in the issue of buying parts. My plan is to extend the addressing capabilities of the 6502 by giving myself 64kb of RAM, and another 64kb of ...
10
votes
3answers
1k views

Why are the PPU registers on the NES mirrored?

The NES Picture Processing Unit has eight memory-mapped registers to the CPU in registers $2000 to $2007. The are incompletely decoded, so they are mirrored every 8 bytes from register $2008 to $...