Questions tagged [memory-layout]
For questions regarding the layout or mapping of memory in a retrocomputer.
74
questions
7
votes
2
answers
1k
views
How to use all memory on an IBM PC with 8086
I'm developing software for the IBM PC with an 8086 processor. I want my program to use all available memory.
I know that I can use DOS int 21h function AH=48h to allocate all available conventional ...
- 1,305
10
votes
1
answer
449
views
How to write Win16 program with only a single segment (combined code+data)?
I wrote a simple Win16 program in NASM assembly. It works on Windows 3.11. (Source code: https://github.com/pts/mininasm/blob/master/demo/hello/helljw16.nasm .)
When I tried to combine the code and ...
- 1,305
22
votes
4
answers
3k
views
Was it possible to cause persistent changes to a mid-1980s IBM-PC using POKE in GWBASIC?
TL;DR: Using the DEF SEG and POKE commands in GWBASIC, was there any way to make changes to an IBM-PC compatible computer that would (a) persist even after a reboot and (b) cause an increase in crash ...
- 926
20
votes
6
answers
4k
views
Where is DOS stored in memory when a program starts?
When the execution of a COM program begins, DOS jumps to address 100h. But at what address is DOS stored in RAM while the COM program is executing? Is DOS stored in conventional memory? If so, isn't ...
- 541
3
votes
2
answers
342
views
Why did the COMX-35 video memory seem unreliable?
In my early days, many many years ago, one of the machines I managed to get my hands on was the COMX-35, a funky little machine based on the 1802 CPU.
I remember trying to develop some games for it ...
- 3,482
22
votes
3
answers
3k
views
What were the actual memory model definitions in MS-DOS?
I've heard the phrase "memory model" used in relation to MS-DOS programming (and early Windows), with terms such as "small" and "compact".
But what were the actual ...
- 3,482
2
votes
1
answer
316
views
When was fixed page size, flexible assignment bank switching patented?
The 8-bit microprocessors invented in the seventies, had a 16-bit address space. It didn't take long for memory demand to exceed this, with the result that bank switching was a fact of life for the ...
- 55k
20
votes
5
answers
3k
views
How did old computers address far more than 64K of memory despite only having a 16 bit address bus?
I have an old Sharp PC-G830 pocket computer from the '80s that has 32K of RAM and 256K of ROM. I also have a simple single board computer I built with 128K of RAM and a few megabytes of ROM from a ...
- 311
18
votes
3
answers
5k
views
Did anyone ever put half a megabyte of memory in an Altair?
The Altair 8800 typically, at least in the early years after its release in 1975, operated with no more than a few kilobytes of memory, for the excellent and sufficient reasons that memory was ...
- 55k
6
votes
3
answers
665
views
How did Apple IIe software handle 64K bank switching?
The early microcomputers were well served by 8-bit CPUs with 16-bit address bus width, but later generations of these machines tended to run out of address space, and had to resort to some form of ...
- 55k
9
votes
2
answers
2k
views
Why did the BIOS load the MBR at 0x7c00?
The IVT is at 0x0000-0x03ff while the BDA is at 0x0400-0x04ff but boot sectors are loaded at 0x7c00. What was at 0x0500-0x7bff that caused this convention? I'm also curious why some MBRs relocate ...
- 455
17
votes
3
answers
4k
views
What is the purpose of mirrored memory regions in NES's CPU memory map? [duplicate]
[Please see answers to this related question as well]
I've started reading the "official" NES Documentation and in page ten, it says that "memory locations $0000-$07FF are mirrored ...
- 173
4
votes
1
answer
365
views
How to assign code to different PRG-ROM banks on an NES ROM using ca65/ld65
A similar question was asked here but I read it and didn't really understand the solution.
What I'm trying to do here is make an NES ROM that uses Mapper 24, aka Konami VRC6 Version 1 (the one used by ...
- 1,566
15
votes
2
answers
1k
views
How much of the Program Segment Prefix area can be reused by programs with impunity?
I am writing a tiny TSR program, and I want it to take as little memory while installed as possible. The memory footprint of every loaded DOS process, including a TSR, includes a data structure known ...
- 20.3k
5
votes
1
answer
372
views
How did games written for tape-based BBC micro, get officially and unofficially ported to disk, bearing in mind extra workspace needed by DFS ROM?
If I recall, PAGE = &E00 for a BBC Model B system with cassette tape based storage.
On installation of Acorn DFS ROM (with 8271 Floppy disc controller), the ROM allocated more memory, increasing ...
- 749
5
votes
2
answers
645
views
What is the reason of the particular range of the last 4K block of memory selection in Apple II
Following my previous question on Identifying the functionality of the memory select in Apple II and now that I know that the memory select device is simply an interconnection block. Searching for ...
- 1,035
6
votes
1
answer
969
views
Bank switching and memory perspectives (C64)
I've been reading up on bank switching on Wiki and in particular here which contains the below nice image and have a few questions:
Am I right in thinking that LOAD loads into RAM (dark grey in the ...
user16295
4
votes
2
answers
917
views
Transforming a memory dump into something loadable
As a follow-up to this question, I now have:
A memory dump of the unpacked application
The start address of the application
I can verify that the dump is correct by starting a new instance of Vice, ...
- 2,593
8
votes
2
answers
826
views
How can I malloc() a block that's guaranteed to lie within a single DMA segment in Turbo C 2.01?
I'm following root42's videos about DOS programming using Turbo C 2.01. I've written my own Soundblaster 1.xx driver following the Creative Labs documentation, and I'm confused about memory allocation....
- 10.8k
9
votes
2
answers
285
views
Paradigm for (repeated) use of PDP-10 indirect bit
Answers to question PDP-10 effective address calculation explain how PDP-10 effective address calculation works, including potentially infinite indirections.
However the answers don't address how this ...
25
votes
7
answers
11k
views
Did any computer use a 7-bit byte?
In an answer to Why did IBM System 360 have byte addressable RAM I wrote regarding the choice of byte size:
7 bits would be a perfect match for ASCII, but engineers would instinctively recoil from ...
- 55k
7
votes
1
answer
1k
views
What is the memory layout in MS-DOS
I know that when an .COM file is loaded, DOS loads its contents into memory, sets the segment registers (CS, DS and SS) to point to the 64KB segment and then performs a jmp to the starting address. ...
- 1,709
6
votes
1
answer
255
views
Details of ZS Scorpion port 0x1ffd
There's this page about the ZS Scorpion, and I'm reading about the way bankswitching works. Port 0x7ffd is the same as on western ZX Spectrums, but to double the amount of RAM to 256k and also the ...
- 36.1k
11
votes
3
answers
2k
views
How can I access/use memory outside of the standard 1 MB address range of MS-DOS?
How do you access more memory (above the 1MB) in DOS if the 640KB of conventional memory are not enough?
I have read a lot about this, but I couldn't figure out how to do this in actual code. Is ...
- 1,709
15
votes
2
answers
3k
views
How was a line of Commodore 64 BASIC code stored in its memory?
I am reading up on old C64 stuff and I am using the Vice emulator to play with it. Currently I am studying about how the C64 stored BASIC programs in RAM.
This is quite clear (it starts on address $...
- 851
4
votes
7
answers
548
views
Static memory partitioning
Does anyone know of any operating system that used static memory partitioning: contiguous physical memory allocation with one process per partition, one partition per process, partitions generated at ...
- 275
9
votes
2
answers
2k
views
In the Amstrad CPC's Mode 0, what was the design rationale for interleaving the pixel bits?
The following tables are modified and corrected from Painting pixels: Introduction to video memory.
Mode 2 - 640x200 (half width pixels), 2 colours
memory bit
7
6
5
4
3
2
1
0
pixel
0
1
2
3
4
5
6
7
...
- 2,517
12
votes
1
answer
1k
views
Why did the Amstrad CPC use a nonlinear screen memory layout?
The screen memory layout on the Commodore 64 in bitmap mode was nonlinear - which incurred a penalty in development time, code size and speed for games using it - because when designing the VIC-II, ...
- 55k
15
votes
1
answer
2k
views
What are the "ports" used via IN/OUT, vs. the PEEK/POKE address space?
This is something of a followup to How much control of TRS-80 Model III disk drives was possible from its Cassette (ROM) BASIC? but on a more general topic:
I know that PEEK and POKE enable direct ...
- 2,843
5
votes
2
answers
2k
views
How did the BBC sideways ROM software for the AMX mouse process the user port input data to determine x and y movement?
This mouse plugged into the user port on the underside of the BBC micro models. The mouse came with software in the form of a sideways ROM which provided APIs, CLI commands for own programs as well as ...
- 749
22
votes
1
answer
3k
views
How is memory allocated in Super Mario World?
Super Mario World (SMW) is known to have several bugs relating to re-use of memory for multiple purposes. For example some memory items are used for more than one type of item, and the designers are ...
- 14.5k
5
votes
9
answers
731
views
Were there any games/software that used memory beyond what was advertised available to BASIC on the machine?
Were there any games/software that used memory beyond what was advertised as available to BASIC on the machine ?
On home / personal computers any time up to 1984 .
Without needing to plug in any ...
- 1,011
3
votes
2
answers
204
views
virtual addressing in device drivers
Sun's SBus is particular for having virtual addressing and address translation even for device drivers.
Any other buss design which had this peculiarity ?
Check out Ben Catanzaro's book The SPARC ...
- 321
14
votes
1
answer
2k
views
What manages Upper Memory Blocks (UMBs) in MS-DOS?
I had always assumed that EMM386.EXE was responsible for managing the Upper Memory Blocks - UMBs - the memory space between 640KiB and 1MiB in real mode x86. For example, on MS-DOS 6.22, help emm386....
- 4,708
10
votes
2
answers
934
views
Can the Nintendo 64 run code directly from ROM?
I've read that the usual way to execute code on the N64 is to use DMA to copy it from ROM into RAM, and then run from RAM.
However, it seems that the contents of the ROM are directly visible to the ...
- 101
10
votes
3
answers
4k
views
Disable memory refresh on Z80
Is there a software method of disabling memory refresh on the Z80? Or would it be acceptable to create a hardware method of disabling the address bus during the refresh cycle? If I switch off the ...
- 203
7
votes
4
answers
1k
views
How to use HGR2 (or HGR) on an Apple II
I am a big fan of the TV show lost, and I was trying to make the Dharma Initiative logo.
But at certain point I couldn't add new lines of code and the final part of the logo was cut off. I tried to ...
- 71
10
votes
2
answers
872
views
Why is the Interrupt Enable Hardware Register in the HRAM area on the Gameboy?
It's something I've always been wondering:
Almost all of the hardware registers on the Gameboy are placed between $ff00 and $ff7f (with plenty of gaps and empty space), the HRAM is located between $...
- 529
30
votes
1
answer
3k
views
Did DOS zero out the BSS area when it loaded a program?
As an example, say we have a DOS MZ EXE file that's around 20 KiB in size. The EXE header contains the value 0x1400 at offset 0x0A indicating that the program is requesting 5,120 paragraphs (or 80 KiB)...
- 1,521
7
votes
5
answers
799
views
Could the Intel 8086 CPU have many segments in memory of the same type?
The Intel 8086 CPU could address up to 1 MB of memory using segmentation, and this CPU have 4 segment registers, which are CS and SS and DS and ES.
Each segment in memory can have a maximum size of ...
- 71
28
votes
3
answers
6k
views
Why did Intel abandon unified CPU cache?
When Intel introduced the 80486 in 1989, they included their first on-chip cache, ostensibly to compete better with Motorola, who had been including on-chip caches for 5 years (MC68020, 1984).
Unlike ...
- 59.1k
2
votes
3
answers
235
views
Paging vs. segments in the Z8000
Having post-dated either, I came to understand the difference between paging and segmentation to be that the former refers to fixed blocks while the later can point anywhere. To do so, the segments ...
- 17.8k
2
votes
2
answers
216
views
ISA Extension cards using more than 64kB
Related to my previous question around VGA framebuffer being limited to 64kB I started to wonder if there was any extension cards (or similar) using more than 64kB of address space in linear fashion, ...
- 2,373
10
votes
3
answers
2k
views
Why VGA framebuffer was limited to 64kB window?
VGA framebuffer was fixed to 64kB at A0000h. Right after that there’s MDA/CGA framebuffer at B0000h. I am not sure, but I recall VGA did have to support CGA and its framebuffer, but was there any ...
- 2,373
9
votes
5
answers
2k
views
C64 cartridge emulation with ATmega
As a personal project I had the idea to create a custom cartridge for my Commodore 64 and use an ATmega 1284p microcontroller to emulate eproms and/or custom chips.
Basically my idea is similar to ...
- 193
7
votes
2
answers
2k
views
IBM PC memory map - why RAM at the bottom?
The 8088 provided an address space of one megabyte.
The IBM PC allocated that address space as 640K RAM (not that the 5150 could physically take that much, but the address space was allocated) ...
- 55k
9
votes
1
answer
859
views
Commodore Plus/4 60671 bytes free - how?
It is widely known that, while the Commodore 64 did indeed provide 64K of RAM for machine code programs, only 38K was usable from BASIC; this was because bank switching was needed to get at the rest, ...
- 55k
4
votes
1
answer
484
views
How is the 320x200x16 graphics mode mapped in the IBM PCjr?
I've read that the PCjr supports a 320x200 pixel mode with 16 colors. But what I can't seem to find is how much memory that takes, how it's organized (chars?) or where it's located in memory.
I'm ...
- 8,191
2
votes
1
answer
188
views
Does the TurboGrafX16 store switches and/or flags in RAM?
Based the the specs I found for the TG16, it has 8 KB of RAM. I also found notes in the documentation of many opcodes that there is data stored in several "flags and switches" are these stored in RAM ...
- 3,961
4
votes
2
answers
382
views
PDP-10 effective address calculation
How does effective address calculation work on the PDP-10?
My understanding is that the instruction code contains an 18-bit address or offset, one bit for indirect, and a register code that's 4 bits. ...
- 36.1k