Questions tagged [memory-layout]

For questions regarding the layout or mapping of memory in a retrocomputer.

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27
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2answers
3k views

How did an IBM 5150 with 16KB RAM work?

I keep reading that when it was first released, there was a variant of the IBM PC model 5150 that had only 16KB of RAM installed. From a hardware perspective, this would clearly work - the 5150 ...
58
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3answers
15k views

Who set the 640K limit?

We all know that "640K should be enough for everyone". But who actually set this limit? The quote is often attributed to Bill Gates, but it doesn't seem like a decision for an Operating System vendor ...
50
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8answers
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Why didn't the 8086 use linear addressing?

The 8086 used a segmented memory architecture where the linear address was computed from a 16-bit segment number and a 16-bit offset. This greatly complicated things from a programming perspective. ...
10
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3answers
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Why are the PPU registers on the NES mirrored?

[Please see answers to this related question as well] The NES Picture Processing Unit has eight memory-mapped registers to the CPU in registers $2000 to $2007. The are incompletely decoded, so they ...
6
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1answer
556 views

Bank switching and memory perspectives (C64)

I've been reading up on bank switching on Wiki and in particular here which contains the below nice image and have a few questions: Am I right in thinking that LOAD loads into RAM (dark grey in the ...
20
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2answers
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How to check the C64 graphics mode used by Maniac Mansion

I have been investigating the MS-DOS port of the C64's Maniac Mansion game. The original MS-DOS port used the C64-specific character map to draw the various backgrounds in the game. I noticed that ...
17
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4answers
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Why did the TI-99/4 have two databuses?

Wikipedia says on Russian page: Однако к 16-разрядной шине были подключены только 256 байт статической памяти и системное ПЗУ. Остальная память (ОЗУ) и периферийные устройства были 8-разрядными и ...
15
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2answers
2k views

How does the Commodore 64 address more than 64 kilobytes of memory?

So, the Commodore 64 has two special registers in locations $00 and $01. By writing to these registers, you can somehow turn on and off the ROMs and other things. The thing that I am not understanding ...
14
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1answer
778 views

How did the Sideways address space work?

I was researching the BBC Micro when I found the Sideways address space: a 16KiB memory space allowing access to up to 16 16KiB external blocks of ROM (or RAM). But 16 blocks of 16KiB is 256KiB, ...
13
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5answers
3k views

Mapping more than 64kb of address space

I'm planning out a 6502 homebrew build but seem to be stuck in the issue of buying parts. My plan is to extend the addressing capabilities of the 6502 by giving myself 64kb of RAM, and another 64kb of ...
9
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2answers
1k views

Unused RAM Chips on x86 machines

On classic x86 machines the upper 384 KB of system memory contains video RAM and BIOS ROM Besides other things. Those areas overlay over conventional RAM, so that you can't use all upper memory, but ...
17
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3answers
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What is the purpose of mirrored memory regions in NES's CPU memory map? [duplicate]

[Please see answers to this related question as well] I've started reading the "official" NES Documentation and in page ten, it says that "memory locations $0000-$07FF are mirrored ...
28
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5answers
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Why is the Amiga ROM at a high memory location, and RAM in low memory?

When a 68000 CPU powers up, it reads a few words at memory location zero to get the initial stack pointer and program counter. That suggests to me that a computer system designer would put the system ...
11
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2answers
1k views

Is all 100% of a 64k Apple II memory usable?

Are there any areas of the 64k RAM which are permanently unusable by anything, whether by the built-in monitor ROM or user programs? Looking at $C000-C0FF, this is the "softswitch" area, and as far ...
9
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3answers
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Why VGA framebuffer was limited to 64kB window?

VGA framebuffer was fixed to 64kB at A0000h. Right after that there’s MDA/CGA framebuffer at B0000h. I am not sure, but I recall VGA did have to support CGA and its framebuffer, but was there any ...
9
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2answers
251 views

Paradigm for (repeated) use of PDP-10 indirect bit

Answers to question PDP-10 effective address calculation explain how PDP-10 effective address calculation works, including potentially infinite indirections. However the answers don't address how this ...
7
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5answers
663 views

Could the Intel 8086 CPU have many segments in memory of the same type?

The Intel 8086 CPU could address up to 1 MB of memory using segmentation, and this CPU have 4 segment registers, which are CS and SS and DS and ES. Each segment in memory can have a maximum size of ...
4
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2answers
312 views

PDP-10 effective address calculation

How does effective address calculation work on the PDP-10? My understanding is that the instruction code contains an 18-bit address or offset, one bit for indirect, and a register code that's 4 bits. ...