Questions tagged [memory-layout]
For questions regarding the layout or mapping of memory in a retrocomputer.
24
questions
28
votes
2
answers
4k
views
How did an IBM 5150 with 16KB RAM work?
I keep reading that when it was first released, there was a variant of the IBM PC model 5150 that had only 16KB of RAM installed. From a hardware perspective, this would clearly work - the 5150 ...
- 12.7k
60
votes
3
answers
16k
views
Who set the 640K limit?
We all know that "640K should be enough for everyone". But who actually set this limit? The quote is often attributed to Bill Gates, but it doesn't seem like a decision for an Operating System vendor ...
- 939
55
votes
8
answers
11k
views
Why didn't the 8086 use linear addressing?
The 8086 used a segmented memory architecture where the linear address was computed from a 16-bit segment number and a 16-bit offset. This greatly complicated things from a programming perspective. ...
- 9,240
10
votes
3
answers
2k
views
Why are the PPU registers on the NES mirrored?
[Please see answers to this related question as well]
The NES Picture Processing Unit has eight memory-mapped registers to the CPU in registers $2000 to $2007. The are incompletely decoded, so they ...
- 9,382
20
votes
2
answers
3k
views
How to check the C64 graphics mode used by Maniac Mansion
I have been investigating the MS-DOS port of the C64's Maniac Mansion game. The original MS-DOS port used the C64-specific character map to draw the various backgrounds in the game. I noticed that ...
user4411
18
votes
4
answers
3k
views
Why did the TI-99/4 have two databuses?
Wikipedia says on Russian page:
Однако к 16-разрядной шине были подключены только 256 байт статической памяти и системное ПЗУ. Остальная память (ОЗУ) и периферийные устройства были 8-разрядными и ...
- 36.6k
16
votes
1
answer
884
views
How did the Sideways address space work?
I was researching the BBC Micro when I found the Sideways address space: a 16KiB memory space allowing access to up to 16 16KiB external blocks of ROM (or RAM).
But 16 blocks of 16KiB is 256KiB, ...
- 18.1k
14
votes
2
answers
2k
views
How does the Commodore 64 address more than 64 kilobytes of memory?
So, the Commodore 64 has two special registers in locations $00 and $01. By writing to these registers, you can somehow turn on and off the ROMs and other things. The thing that I am not understanding ...
- 36.6k
6
votes
1
answer
1k
views
Bank switching and memory perspectives (C64)
I've been reading up on bank switching on Wiki and in particular here which contains the below nice image and have a few questions:
Am I right in thinking that LOAD loads into RAM (dark grey in the ...
user16295
29
votes
6
answers
4k
views
Why is the Amiga ROM at a high memory location, and RAM in low memory?
When a 68000 CPU powers up, it reads a few words at memory location zero to get the initial stack pointer and program counter. That suggests to me that a computer system designer would put the system ...
- 4,718
28
votes
3
answers
7k
views
Why did Intel abandon unified CPU cache?
When Intel introduced the 80486 in 1989, they included their first on-chip cache, ostensibly to compete better with Motorola, who had been including on-chip caches for 5 years (MC68020, 1984).
Unlike ...
- 59.4k
25
votes
7
answers
11k
views
Did any computer use a 7-bit byte?
In an answer to Why did IBM System 360 have byte addressable RAM I wrote regarding the choice of byte size:
7 bits would be a perfect match for ASCII, but engineers would instinctively recoil from ...
- 55.6k
22
votes
3
answers
3k
views
What were the actual memory model definitions in MS-DOS?
I've heard the phrase "memory model" used in relation to MS-DOS programming (and early Windows), with terms such as "small" and "compact".
But what were the actual ...
- 3,517
18
votes
3
answers
4k
views
What is the purpose of mirrored memory regions in NES's CPU memory map? [duplicate]
[Please see answers to this related question as well]
I've started reading the "official" NES Documentation and in page ten, it says that "memory locations $0000-$07FF are mirrored ...
- 183
15
votes
2
answers
3k
views
How was a line of Commodore 64 BASIC code stored in its memory?
I am reading up on old C64 stuff and I am using the Vice emulator to play with it. Currently I am studying about how the C64 stored BASIC programs in RAM.
This is quite clear (it starts on address $...
- 851
14
votes
5
answers
4k
views
Mapping more than 64kb of address space
I'm planning out a 6502 homebrew build but seem to be stuck in the issue of buying parts. My plan is to extend the addressing capabilities of the 6502 by giving myself 64kb of RAM, and another 64kb of ...
user7013
12
votes
2
answers
1k
views
Is all 100% of a 64k Apple II memory usable?
Are there any areas of the 64k RAM which are permanently unusable by anything, whether by the built-in monitor ROM or user programs?
Looking at $C000-C0FF, this is the "softswitch" area, and as far ...
- 3,561
10
votes
3
answers
2k
views
Why VGA framebuffer was limited to 64kB window?
VGA framebuffer was fixed to 64kB at A0000h. Right after that there’s MDA/CGA framebuffer at B0000h. I am not sure, but I recall VGA did have to support CGA and its framebuffer, but was there any ...
- 2,383
9
votes
2
answers
2k
views
Why did the BIOS load the MBR at 0x7c00?
The IVT is at 0x0000-0x03ff while the BDA is at 0x0400-0x04ff but boot sectors are loaded at 0x7c00. What was at 0x0500-0x7bff that caused this convention? I'm also curious why some MBRs relocate ...
- 455
9
votes
2
answers
1k
views
Unused RAM Chips on x86 machines
On classic x86 machines the upper 384 KB of system memory contains video RAM and BIOS ROM Besides other things. Those areas overlay over conventional RAM, so that you can't use all upper memory, but ...
- 1,274
9
votes
2
answers
288
views
Paradigm for (repeated) use of PDP-10 indirect bit
Answers to question PDP-10 effective address calculation explain how PDP-10 effective address calculation works, including potentially infinite indirections.
However the answers don't address how this ...
7
votes
5
answers
808
views
Could the Intel 8086 CPU have many segments in memory of the same type?
The Intel 8086 CPU could address up to 1 MB of memory using segmentation, and this CPU have 4 segment registers, which are CS and SS and DS and ES.
Each segment in memory can have a maximum size of ...
- 71
5
votes
2
answers
2k
views
How did the BBC sideways ROM software for the AMX mouse process the user port input data to determine x and y movement?
This mouse plugged into the user port on the underside of the BBC micro models. The mouse came with software in the form of a sideways ROM which provided APIs, CLI commands for own programs as well as ...
- 749
4
votes
2
answers
395
views
PDP-10 effective address calculation
How does effective address calculation work on the PDP-10?
My understanding is that the instruction code contains an 18-bit address or offset, one bit for indirect, and a register code that's 4 bits. ...
- 36.6k