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Questions tagged [microprocessor]

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15 votes
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What's the story behind the "mysterious" 486DX3?

As I was skimming through an old MS-DOS game's README, I stumbled upon this: Therefore, we reccomend a newer 486-100 or better, preferably with a large external cache. Best performance will result ...
aybe's user avatar
  • 7,092
3 votes
0 answers
179 views

What aspects of microprocessor ISAs have been patented?

A key objective of RISC-V was that every aspect of the ISA must be based on an expired patent. It was felt that this is the only truly reliable defense against patent lawsuits. It is surprising that ...
rwallace's user avatar
  • 61.4k
22 votes
3 answers
7k views

How could the Intel 4004 address 640 bytes if it was only 4-bit?

I am reading Computer Organization and Architecture, 10th ed. by William Stallings and I found this on page 26. where it says the addressable memory of 4004 is 640 bytes. But it appears that the ...
Noob_Guy's user avatar
  • 693
4 votes
0 answers
394 views

How did Z8000 implement mul/div in few transistors with no microcode?

The Z8000 was Zilog's entry in the 16-bit microprocessor market; it was unsuccessful in large part, as I understand it, because it took too long to debug. According to https://thechipletter.substack....
rwallace's user avatar
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1 vote
1 answer
185 views

Why does my Mikrolab randomly freeze and unfreeze, and what can I do about it?

I've started using my Soviet Mikrolab KR580IK80 (a clone of the Hewlett Packard 5036A) again, and I've noticed some behaviour which it used to exhibit but now it seems more frequent. Basically after ...
harlandski's user avatar
  • 2,953
13 votes
3 answers
517 views

How much extra die area did a CMOS CPU take?

Starting in the late seventies, the microchip industry generally switched from NMOS to CMOS, primarily because CMOS circuits use less power, though they also have other advantages like more noise ...
rwallace's user avatar
  • 61.4k
9 votes
6 answers
816 views

Would compare-and-branch have added an extra cycle on ARM-1?

The ARM-1 was an early RISC CPU, designed in 1986 (and even more typical of early RISC design constraints than the year would suggest, since Acorn didn't have the budget to pay for the latest process ...
rwallace's user avatar
  • 61.4k
20 votes
4 answers
6k views

Does any computer resemble the model taught in UK secondary education?

In UK secondary education, there's a model called the fetch-execute cycle, which describes how computers work. (See: Isaac CS; Bitesize GCSE, Higher; Teach CS.) As I understand it: The processor has ...
wizzwizz4's user avatar
  • 18.6k
15 votes
2 answers
2k views

Were there any enhancement chips that vastly outperformed the main CPU?

Were there any enhancement chips in officially-released games that were CPUs themselves and which ran the game code itself, relegating the role of the main CPU to that of a thin client? To elaborate, ...
forest's user avatar
  • 2,029
22 votes
5 answers
4k views

How did old computers address far more than 64K of memory despite only having a 16 bit address bus?

I have an old Sharp PC-G830 pocket computer from the '80s that has 32K of RAM and 256K of ROM. I also have a simple single board computer I built with 128K of RAM and a few megabytes of ROM from a ...
Shades's user avatar
  • 331
0 votes
1 answer
174 views

How the technology keeps improving [closed]

How does the technology keep improving despite having everything discovered already? I mean the same sized chips and electronics are used from year to year but with every new version of the main board ...
Borislav Stefanov's user avatar
5 votes
3 answers
1k views

Why has the Intel Itanium failed to take on the world? [closed]

Last summer, the Itanium has finally been discontinued, twenty years after its release. It was a promising technology, but in the end it turned out to not really be the case. Beside a few niche ...
aybe's user avatar
  • 7,092
9 votes
1 answer
395 views

McDonnell-Douglas 16-bit microprocessor?

I've been working on the NatSemi PACE article and I'm trying to track down a bit of trivia... someone inserted a statement: McDonnell Douglas produced a classified military 16-bit processor called ...
Maury Markowitz's user avatar
8 votes
2 answers
471 views

What is the relation between external clock and internal states in the 68000?

(I'm assuming a memory cycle of 500 ns, without wait states.) According to the 68000 bus diagram, there are 4 CPU cycles for a memory cycle, so an external frequency of 8 MHz. However, things are ...
airman's user avatar
  • 1,350
5 votes
4 answers
1k views

The Slowest Microprocessor [closed]

I've read that Z3, first electromechanical general purpose computer operated at a frequency of about 5–10 Hz, and the ENIAC had a 100 kHz clock, though each instruction took 20 cycles. What ...
alessandro's user avatar
11 votes
3 answers
2k views

Were there any NMOS (or PMOS) processors that could tolerate a stopped clock?

Early microprocessors often used NMOS or PMOS transistor technology (see this question for their use in early Intel chips). Techniques such as implementing registers with dynamic memory cells (...
DrSheldon's user avatar
  • 16k
6 votes
1 answer
397 views

How does an 8086 CPU remember the memory address where it should write back the operation’s result? [closed]

I have an instruction: ADD [BX][SI] + 5FFDH, EABFH and I want to know how it operates exactly on 8086 microprocessors. I've realized that this instruction ADD [BX][SI] + 5FFDH, EABFH, works in this ...
user3866081's user avatar
7 votes
3 answers
5k views

What is the MOS 6502 doing on each cycle of an instruction?

So, first off, I am kind of a noob with emulators and the 6502. Summarise the problem If we for example take the instruction ADC Immediate ($69) which adds the accumulator to an immediate value and ...
user avatar
6 votes
2 answers
849 views

What was the first microprocessor to overlap loads with ALU ops?

Modern out of order CPUs can do all sorts of things in parallel, having not only multiple functional units, but a lot of logic to check at runtime exactly which instructions really depend on others, ...
rwallace's user avatar
  • 61.4k
-1 votes
1 answer
173 views

Possible and impossible RAM layouts in 8086 [closed]

The Intel 8086 CPU could address up to 1 MB of memory using segmentation, and this CPU have 4 segment registers, which are CS and SS and DS and ES. Each segment in memory can have a maximum size of 64 ...
Asra Zibaie's user avatar
5 votes
3 answers
3k views

8086 duration of program

I have the following assembly code for 8086 MOV AL, [BX] OUT DX, AL The bus clock frequency is 1MHz. Access to memory is done without WAIT, and to I/O with one WAIT tick. How I can calculate the ...
gameloverr2's user avatar
13 votes
1 answer
2k views

Intel processor transistor type evolution

The Intel 4004 used MOS (metal–oxide–semiconductor) transistors. What has been the transistor types used in Intel processors onwards from the 4004 to 8085 to the x86 family of instruction set ...
Single Malt's user avatar
  • 1,849
0 votes
1 answer
206 views

Carry flag in the Intel 8008

Datasheet for the Intel 8008 CPU mentions that the Carry (C) flag is affected with the logic operations (AND, OR, XOR), but it does not make any sense. I believe Carry will be zeroed, but I have no ...
Martin Maly's user avatar
  • 5,575
3 votes
1 answer
498 views

Intel 8008 stack behavior

Intel 8008 CPU has an internal stack, implemented as an 8 x 14-bit scratchpad. How does it work exactly? Is there any "invisible 3-bit stack pointer"? I want to know what happens when the ...
Martin Maly's user avatar
  • 5,575
8 votes
0 answers
310 views

Undefined opcodes for the Intel 8008 CPU

What happens when I8008 CPU reads the "undefined" opcode (22h, 2Ah, 32h, 38h, 39h, 3Ah; or in octal 042, 052, 062, 070, 071, and 072)? Are these opcodes evaluated as a NOP instruction, or ...
Martin Maly's user avatar
  • 5,575
9 votes
4 answers
2k views

Why did later CPUs use microcode instead of PLA's?

If you look at a die photo of a 6502, about forty percent of the chip is taken up by what's obviously microcode, both by its regular structure and by the obvious need for such from the instruction set,...
rwallace's user avatar
  • 61.4k
49 votes
2 answers
12k views

Why does the 80486 take longer to execute simple instructions than complex ones?

The 80486 processor can execute many instructions in a single cycle, such as a register-to-register add instruction (ADD EAX, EBX, for example), which one would generally assume is fairly complex, ...
occipita's user avatar
  • 2,367
21 votes
3 answers
5k views

What happened to the 65832?

In his June 1985 foreword to Programming the 65816 by David Eyes and Ron Lichty, Bill Mensch expresses his hopes for a 6502-derived 32-bit microprocessor: the 65832. WDC is still thriving, but the ‘...
Jacob Krall's user avatar
  • 2,289
2 votes
2 answers
795 views

How do microprocessors multiply without a "Multiply" instruction? [duplicate]

I was reading about the SAP computers(as I do), and examined the SAP-2 chapter of Paul Malvino's Digital Computer Electronics, hoping to learn about how a microprocessor without a multiply instruction ...
Nip Dip's user avatar
  • 341
0 votes
1 answer
459 views

4MHz Z80 timing and PAL video generation

Im trying to get some nice colored lines on some old Z80 system synced to the PAL screen, but having some sort of a problem. First I just need to know if my facts are right. I know that on Commodore ...
Natural Number Guy's user avatar
3 votes
2 answers
358 views

What's the Motorola microprocessor with two sets of registers to avoid costly context switch?

I remember reading somewhere (maybe on Hacker News or Lobsters) that Motorola made a microprocessor some decades ago with two sets of registers. This means when handling an interrupt, it does not need ...
nalzok's user avatar
  • 131
92 votes
10 answers
33k views

How much better was DEC Alpha than contemporaneous x86?

The DEC Alpha, released in 1992, seems like an early implementation of a fully 64-bit microprocessor architecture. Its release led to quite a bit of both marketing hype and genuine vendor support in ...
Brian H's user avatar
  • 60.8k
-8 votes
1 answer
20k views

What is the maximum 64 bit integer (number) value? [closed]

I already know that the maximum integers for ranges higher than 24-bit (16 777 216) will very likely exceed 1 000 000 000, so, what is the maximum 64 bit integer? It is larger than 10 bilion?
hinamuyatutama's user avatar
40 votes
15 answers
17k views

Were there ever 12-, 24-, 48-, etc bit processors?

After seeing this question, I was struck with an intense curiosity to know: Were there ever processors with word sizes that aren't powers of two, specifically after the 8-bit byte became the industry ...
Hearth's user avatar
  • 725
6 votes
2 answers
566 views

Are there any CPUs or MCUs object-compatible with the 6800 that have additional index registers or addressing modes?

Having only a single index register and no addressing mode indexing against 16-bit addresses in memory seems to have been widely considered a primary reason that the Motorola 6800 fared poorly in ...
cjs's user avatar
  • 26.6k
3 votes
3 answers
582 views

Interrupt pin type on the 6502

I have a really basic question. I have to design an 65C02-based personal computer for a school project. I have to draw my own footprint for the 65C02. My question is what type of pin is the IRQB (...
ZaharyMomchilov's user avatar
10 votes
3 answers
4k views

How does Game Boy / Sharp LR35902 HRAM work?

The Nintendo Game Boy has RAM called "HRAM" (meaning "high ram") decoded at locations $ff80 through $fffe. (All other decoded locations in the $ffxx page appear to be I/O device and system control ...
cjs's user avatar
  • 26.6k
6 votes
1 answer
404 views

Tannenbaum paper on constants in ISAs?

I see many references to a paper by Andrew Tanenbaum that demonstrated the vast majority of constants would fit into 13-bits, and I seem to recall it being in my university text on CPU design. However,...
Maury Markowitz's user avatar
4 votes
2 answers
3k views

How exactly do all control signals in 6502 work?

I'm trying to make a 6502 replica in Logisim. I want to know what exactly each control signal in 6502, how the clock cycles work and additionally I would like to see an example of these control ...
Senijs's user avatar
  • 41
3 votes
2 answers
625 views

Total number of 6502s or 8051s ever manufactured or sold?

What's a good way to estimate the total number of 6502 or 8051 chips (or workalikes, pin-compatible or not, but not including software or FPGA emulators) ever manufactured or sold? Added: (To ...
hotpaw2's user avatar
  • 8,219
13 votes
3 answers
2k views

What was the first microprocessor to support full virtualization?

Virtual memory, which allows an operating system to run several machine code programs isolated from each other, came to the desktop during the eighties. But full virtualization, which lets the ...
rwallace's user avatar
  • 61.4k
18 votes
5 answers
4k views

Why are different emulators needed to run platforms that use 6502 assembly code?

To my knowledge, an emulator turns machine code for a console into something that your computer can understand. For example, assembly code from a Gamecube game is not the same as from a .exe file. ...
Jonathan O'Brady's user avatar
3 votes
1 answer
2k views

What is the difference between an 8080 and an 8051? [closed]

What are the features of the Intel 8051 architecture that allow it to successfully act as a microcontroller? Hypothetically can the general-purpose 8-bit architecture like Intel 8080 do everything the ...
Jet Blue's user avatar
  • 2,005
16 votes
2 answers
2k views

6502 branch offset calculation

This question expands on How does the 6502 implement its branch instructions? I'm working on a cycle accurate VHDL implementation on an FPGA. I have much of the program logic already written, but I ...
Evan's user avatar
  • 163
21 votes
8 answers
11k views

Uses for the halt instruction?

What was the halt instruction in early CPUs such as the Z80 and 8080 used for? Here's a description of the Z80 instruction: The HALT instruction suspends CPU operation until a interrupt or reset ...
Jet Blue's user avatar
  • 2,005
31 votes
5 answers
8k views

How was microcode implemented in retro processors?

How was microcode implemented in retro processors such as the Z80 or 8080? Was the microcode standard (for example a manual for the processor outlining all possible micro-instructions and the ...
Jet Blue's user avatar
  • 2,005
16 votes
2 answers
1k views

Can we express the instructions to the Analytical Engine in terms of assembler or machine code?

On a recent trip to the London Science Museum I saw Babbage’s Analytical Engine. Apparently this had an ALU (or equivalent). I can build an ALU out of logic gates but I can’t conceptualise how to do ...
hawkeye's user avatar
  • 2,575
50 votes
5 answers
17k views

Why did CPU designers in the 70s prioritize reducing pin count?

A lot of 70s era microprocessors were packaged in DIP packages with 40 pins. This was a reasonably good fit for 8-bit processors: 16 address lines, 8 data lines, 2 power and clock are all absolutely ...
Jules's user avatar
  • 13k
102 votes
6 answers
11k views

Were there 8086 coprocessors other than the 8087?

The 8087 math coprocessor for the 8086 (and descendants) nominally added floating point and transcendental (trigonometric and logarithmic) instructions to the 8086. Contrary to naive expectations, the ...
Euro Micelli's user avatar
  • 2,775
35 votes
2 answers
3k views

Can the two CPUs in a Commodore 128 run at the same time?

The Commodore 128 has two CPUs. One is some variant of the 6502, and the other is a Z80. One CPU is there for compatibility with the Commodore 64 and the other is there presumably to give basic ...
Omar and Lorraine's user avatar