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A quote from the Wikipedia: The PDP-5's instruction set was later expanded in its successor, the PDP-8, to handle more bit rotations and to increase the maximum memory size from 4K words to 32K wo …

I can see the pinouts of these two chips are utterly different. Apparently the 'E needs an external clock as well. This question isn't so much about any of those hardware related differences. This que …

Reading Decoding Z80 Opcodes, There's a section about the 0xDD prefix. This instruction prefix causes the next instruction to use the IX register instead of the HL register. That makes sense. HL and I …

I am looking at the machine code for the LGP-30, which is found to have a very strange instruction word layout. 12 ignored bits 4 bits for the opcode 2 more ignored bits 12 bits for the operand, cons …

This page describing the БЭСМ-6 instruction set refers to a value called ω, which is stored inside a Mode Register. It appears to be set by certain kinds of instructions, so that ω can tell you which …

Motorola's 68000 has an instruction like ori.b #immediate, d0. This particular instruction is encoded as all zeroes, followed by a full 16 bits encoding an 8-bit immediate value. The instruction word …

DEC, and at least some of their computers, especially those in the 18-bit family and 12-bit family, had these opr instructions, which contained many bitfields which encoded something like "subinstruct …

The PDP-11 has seven dyadic instructions (I'm not counting the byte/word varieties separately), which take a full six bits for each of its operands. That's twelve bits to specify the operands, and fou …

My understanding is that the Intel 8088 has this buffer which reads ahead in the instruction stream whenever it has a spare bus cycle or two, so that when the time comes to execute that instruction, i …

The 6502 has a bit instruction which copies two of the bits into the N and V flags, pretends to and the byte with the accumulator, but discards the result and only affects Z. I'm having a hard tim …

The 6502 has a group of opcodes which copy bit 5 from the opcode into one of the status flags. (I know it's not implemented this way, but it looks as though the bit fields are: 2 bits to select the …

The PDP-11's program counter was addressable in two ways: as a general purpose register or as a memory location. Still, the PDP-11's instruction set included separate instructions for moving a new v …

The Z80 has an instruction RLD, which apparently treats the lower 4 bits in the accumulator and the full 8 bits in (HL) as a twelve bit integer which it then rotates left by 4 bits. The carry flag doe …

I am able to find a few instructions, such as: Fin (presumably "Fine", as in the end of a musical score, ends a program), Fin', (a conditional Fin), St (possibly "Start" -- the need for this is unc …

For some context to this question see Raffzahn's excellent question and answer How were Zuse Z22 Instructions Encoded?. The Z22 treats the first few locations of its address space in a particular way …