60 votes

Why were there no 32-bit versions of 65xx CPUs, or 64-bit versions of m68k CPUs?

The premise in the question is incorrect. There were such chips. The question also fails to allow for the way that the silicon-chip industry developed. Moore's Law basically said that every 18 months, ...
Liam Proven's user avatar
  • 1,175
24 votes

Why were there no 32-bit versions of 65xx CPUs, or 64-bit versions of m68k CPUs?

The 65816 was close to the bare minimum of a 16 bit processor. It was primarily used where compatibility with existing 6502 code was needed, such as with the Apple IIgs. It was also used where the ...
RETRAC's user avatar
  • 13.7k
19 votes
Accepted

How does JSR actually work on the 65c816 CPU for the SNES (Super Nintendo)?

JSR works how you think — the program counter will head off to 80fa — but the SNES doesn't. The two most common memory mappers both mirror what's at $00xx at $80xx. So when the processor reads from $...
Tommy's user avatar
  • 36.9k
18 votes
Accepted

What happened to the 65832?

In the 1988 Report on the 65c832, Mensch described the 65c832 as a back-burner project with an uncertain timeline: Since WDC is not a gigantic conglomerate, it has limited resources. If all ...
Michael Graf's user avatar
  • 10.1k
13 votes

Why were there no 32-bit versions of 65xx CPUs, or 64-bit versions of m68k CPUs?

I don't understand why western design centre made the 65816 a 16bit upgrade to the 6502 but commodore semiconductor group/MOS technology didn't make their own variant For one, the 65816 is only a 16 ...
Raffzahn's user avatar
  • 223k
13 votes
Accepted

Did Nintendo pay WDC for their use of the 65816 core?

William "Bill" Mensch exclusively designed the chip to Nintendo, and the interview of Bill Mensch leaves lots of question marks, but his motto was that both sides would benefit from the ...
Petri-fied's user avatar
13 votes
Accepted

Inserting NOPs to improve IIgs shadow copy performance

Mythbusted! With 2021 knowledge of how the FPI/CYA work, this simply didn't make sense. So I plugged in a logic analyser and timed the Wolfenstein 3D code (NOP every 8 PEI's). I then modified the code ...
Ian Brumby's user avatar
12 votes

Inserting NOPs to improve IIgs shadow copy performance

Keep in mind that because the memory in banks $E0 and $E1 are used as the 128K of memory in 8-bit mode (yeah, it's counterintuitive), they are controlled by the MEGA II chip, which is in essence an ...
Eric Shepherd's user avatar
12 votes
Accepted

Early 65C816 CPU's SEP and REP instruction are followed by a NOP?

The original 65816 layout was done by hand and was not amenable to high speeds. In particular, REP/SEP (perhaps PLP as well) instructions didn't complete in 3 cycles when overclocked. (Even today, the ...
Kelvin Sherlock's user avatar
12 votes

Why isn't the WDC 65816 available in "externally" 16-bit versions?

The 65816 physically has an 8-bit ALU, though many of the internal registers are now 16 bits wide. It therefore takes an extra cycle to perform each ALU operation in 16-bit mode, and this helpfully ...
Chromatix's user avatar
  • 16.8k
9 votes

Why isn't the WDC 65816 available in "externally" 16-bit versions?

The 65816 is intended as an upgrade path to existing 6502 customers. Keeping it 8 bit was a sensible decision from a user view as it offers Easy upgrade of existing designs Fully compatible with ...
Raffzahn's user avatar
  • 223k
9 votes

Why were there no 32-bit versions of 65xx CPUs, or 64-bit versions of m68k CPUs?

Because binary compatibility in most cases is overrated and not worth compromising a design to maintain. The only reason to extend a chip family like that is to maintain binary compatibility. In ...
Will Hartung's user avatar
  • 12.3k
8 votes

Why were there no 32-bit versions of 65xx CPUs, or 64-bit versions of m68k CPUs?

To add to the other answers, the 65xx family design, with just a few on-chip registers, made sense when transistors were expensive, and memory accesses were cheap. That allowed using the zero page as, ...
John Dallman's user avatar
  • 13.2k
8 votes

What happened to the 65832?

I suppose you have heard of the draft datasheet of the 65832? https://downloads.reactivemicro.com/Electronics/CPU/W65C832%20CPU%20Datasheet%20v2.0.pdf Apple was the main customer of the 65816 (for ...
Grabul's user avatar
  • 3,657
6 votes

Early 65C816 CPU's SEP and REP instruction are followed by a NOP?

I am not an expert on this processor or its history but this sounds like the sort of silicon bug that I have had to deal with on many processors over the years. It is often the case that there are ...
uɐɪ's user avatar
  • 489
5 votes

What is the relation between external clock and internal states in the 68000?

With the help of the PDF I found in @dirkt's link, I'm able to answer my question. Yes, there are internal T signal states, each of them running in the active phase of two non overlapping 8 MHz ...
airman's user avatar
  • 1,350
5 votes

How does JSR actually work on the 65c816 CPU for the SNES (Super Nintendo)?

The header file that is used in your linked source code directs WLA to compile for a ROM using the LOROM map and the first 32K of ROM are mapped into bank 0 at offsets $8000-$FFFF. So your (mapped) ...
WimC's user avatar
  • 1,086
5 votes

Why isn't the WDC 65816 available in "externally" 16-bit versions?

The advantage of the 8-bit external data bus and multiplexing of the top 8 bits of the address bus in the first release of the 65816 seems clear. There were actually two versions of the chip: the ...
cjs's user avatar
  • 26.1k
4 votes
Accepted

65C816: Inputs TTL-compatible?

Are old 65C816s TTL compatible? If their Vih is 2.0v, they are certainly TTL-compatible. Was there some kind of change? All WDC chips seem to be verilog-reimplemented, so when they synthesized ...
lvd's user avatar
  • 10.4k
4 votes

What happened to the 65832?

At some point before 1990 the idea seems to have first surfaced as a 'report' about 6502 chronology and future processors might suggest. It includes not only information about the ghostly 6516, but ...
Raffzahn's user avatar
  • 223k
3 votes

Why isn't the WDC 65816 available in "externally" 16-bit versions?

The W65C265S, a 65816 based micro controller, has the entirety of the 24b address bus exposed, with a separate 8b data bus. And, to be clear, the '265S is "not" a 65816. It's very, very close. But ...
Will Hartung's user avatar
  • 12.3k
3 votes

Why isn't the WDC 65816 available in "externally" 16-bit versions?

I guess the answer is simple: there is no need for such a version of 65C816 nowadays. The Western Design Center (WDC), the 65C816 manufacturer, focuses on IPs and IoT things. I guess the "new 65C816" ...
Martin Maly's user avatar
  • 5,535
1 vote

What is the relation between external clock and internal states in the 68000?

It is quite typical in chip designs using common IC technology nodes of that era (around 5000 NM NMOS) to require a separate clock phase to precharge any bus signals before they can be used for logic ...
hotpaw2's user avatar
  • 8,183
1 vote

Why were there no 32-bit versions of 65xx CPUs, or 64-bit versions of m68k CPUs?

I found this quotation of an RISC-based supercharged 6502 interesting and may clarify to some extent this question and its comments on the relation of RISC and 6502. A RISC based implementation of ...
Schezuk's user avatar
  • 3,752

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