Hot answers tagged

85

For once, I do have a direct source for a "Why didn't they ...?" question. Eric Isaacson, back in the late '80s and '90s, wrote a commercial assembler for the 8086, called A86. (His homepage still has a section offering it for sale for $50, $52 outside North America, and explaining why it's the best assembler on the market for DOS. You can even download ...


80

Not all of the original co-processors were for floating point math. Intel itself offered an I/O coprocessor for the 8088 and 8086 called the 8089. Part of the reason it didn't do as well as the 8087 is that the PC included an empty socket for an 8087, but no support for the 8089. If you broaden the conversation out beyond just the 8086 generation of chips, ...


68

TL;DR; Using INT comes not only natural due the way the 8086 is designed, but was as well intended by Intel as OS entry point, much like a Supervisor Call (SVC) on /360 type mainframes: (Excerpt from the October 1979 Intel 8086 Family User's Manual page 2-28.) Software-initiated interrupt procedures may be used as service routines ("supervisor calls&...


59

Generally, the "bitness" of a CPU is determined by the usual or common size of its data registers (or, the width of its data bus), rather than the width of the address bus. There are exceptions, for example while the 8086 is considered a 16-bit CPU because it has a 16-bit data bus, the 8088 (which is software compatible with the 8086 and is also a 16-bit CPU)...


54

Illegal opcodes were just instructions that hadn't been fully defined by the chip designers – a little like Undefined Behaviour in C, but much more predictable. Many people called these "undocumented instructions", because they functioned just like ordinary instructions, on the particular versions of the particular chips on which they are found. There was no ...


47

8086 was designed to make asm source porting from 8080 easy (not the other direction). It is not binary compatible with 8080, and not source-compatible either. 8080 is not an x86 CPU. 8080 is a more distant ancestor that had some influence on the design of 8086, but it's not the same architecture. As an analogy, all x86 CPUs are the same genus but ...


46

There are no technical reasons, as any order would work and result in the same amount of gates. More likely it originated in the process by which the 8086 was developed. A main goal was to allow easy conversion of 8080 programs, so the development of the 8086 structure started out from a 8080 programming model. 8080 registers were ordered as 16 bit pairs in ...


44

The opcodes in your list are all only 16 bits (plus the extra bytes for address calculation) and you'll notice that they all begin (in hex) with Dx where x >= 8. This is because, to the 8086, any instruction whose first byte has the bit pattern 11011xxx was deemed to be an 8087 coprocessor instruction. When the 8086 encountered a floating point opcode, it ...


44

It might be better to think about it this way: On the 80186 and above, a new thing was defined called an "illegal instruction", and this new thing came with a new behavior -- a #UD exception that was generated when one was encountered. Before the 80186/80286, there was no such thing as an illegal instruction, just undocumented ones. Your question then ...


41

What it boils down to is that, unlike in a flat addressing model, there are multiple types of pointers: near - 16-bit (16-bit offset only.) far - 32-bit (16-bit offset + 16-bit segment) huge - The same asfar, but the compiler generates code to automatically manage the segment when doing pointer arithmetic. (This is slow, but can convenient, because it ...


37

[Preface: This is neither about discussing programming tricks nor how some changes could squeeze out a byte or two. Code can often be optimized by narrowing down the environment. The examples are meant rather for a generic estimation. ] The question has already been asked in ways of 6502 vs. Z80 and PNDC provided a good answer pointing out that real code ...


29

But why the Intel 8086 CPU is called a 16-bit CPU even though its address bus is 20-bit, shouldn't it be called a 20-bit CPU? Address bus size is probably the least used method to determine CPU "size". For example, the Z80 and many other CPU chips that are commonly considered 8-bit, has a 16-bit address bus. That allows easy access to 64k of memory, which ...


28

According to Wikipedia, a number of reasons contributed to IBM’s using the 8088 instead of the 8086: Intel offered them a better price for the 8088 and was able to supply more of the chips; the 8-bit data-bus meant that IBM could use a modified 8085 design (the System/23) instead of coming up with a new 16-bit design; it also meant that IBM could use more ...


27

No. There is no mechanism for any privilege levels or protection in 8086. As a consequence, there is nothing special about OS code, and thus user applications are allowed to do everything, including reading and writing to any physical memory address, directly access any I/O port, and enable/disable interrupts at will. Protected mode was introduced in 80286....


26

The 8086 used a segmented memory architecture where the linear address was computed from a 16-bit segment number and a 16-bit offset. This greatly complicated things from a programming perspective. I beg to differ. Using segments doesn't 'complicate' things in any way. Sure, it may require a different style of structuring the data used and there are very ...


26

The short answer would be "No", since there is no way to prevent a user process from accessing privileged address space (of the OS or other processes) without some form of memory protection. Usually, this memory protection has to be implemented in hardware of the processor, such as you pointed out with 80286 protected mode. Some alternatives would be: A ...


25

Alan Cox mentions in this post having seen a hard drive interface that plugged into the 8087 socket (for computers with no expansion slots). I've checked various issues of Amstrad PC magazine. PPC hard drive upgrades are advertised by ABSI Consultants, Alfa Electronics Ltd, Dovetail DST, International Hard Discs, and Stratum Technology Limited. I have a PPC ...


24

I don't think there ever were any incompatible co-processors which used the same sockets and I/O mechanisms as the Intel co-processors. There were other incompatible co-processors, at least for the 386 and 486: the Weitek 3167 and 4167 (Wikipedia also mentions the 1067 for 286s, and 1167 and 2167 for 386s, but I don't know anything about them). These ...


24

To supplement @PeterCordes's excellent answer, I thought it would be worth going into the details of exactly how close to source code compatible the two processors are -- for example, how easy would it be to use textual substitutions (e.g. macros) to automatically translate 8080 code to 8086 code, and what the limitations would be. The first point would be ...


23

If you go back a lot before the x86, this technique wasn't unusual at all. In fact, writing programs using printable letters and symbols was pretty much the norm for early computers, except that there was a number of encodings for words of varying bit size, and that encoding was not ASCII. Examples: On the IBM 1401 (1959), a program that looked like ,...


21

PCem aims to be an accurate emulator, and its 8086/8088 timings are accurate. It can emulate a wide variety of hardware, and can model specific PCs with their ROMs (such as the original IBM PC, the Amstrad 1640, and many others). It is available for Linux and Windows. Its 8086 emulation is implemented in src/808x.c — you can see there that it keeps track of ...


20

Your reading is correct, SP is undefined after a reset and the stack has to be set up appropriately by the initialisation code before it can be used. Interrupts are disabled after reset so there’s no risk of the stack being used by an interrupt (short of a NMI, but you’re in dire straits if that happens anyway at this stage). The book I’m looking at just ...


20

It seems the diagrams are not accurate. I wrote a test program that traces INT1 invocations (and delays execution during INT1 to increase the chance of getting hit by timer interrupts) while executing the following machine language fragment: pushf mov ax, 300h ; 100h = TF; 200h = IF push ax popf ; This instruction sets the trace flag mov ...


19

As others have mentioned this does indeed look like a strange attempt to allocate memory for the game. What do the programs do? The TSRs (and presumably the game executable) use interrupt vectors as global storage to hold flags and pointers to the allocated memory. The first program, R32768, uses 49A6 in 00180 and 00182 (interrupt vector 60h) as its ...


19

A computer using an 8086 can provide memory protection by using an external memory management unit. This would be a chip or a circuit that sits between the CPU and the memory and provides an additional layer of memory translation, sends interrupts if out-of-range memory is accessed, and so on. I don't know if this was commonly done on the 8086 (I've never ...


19

Why is the Intel 8086 CPU called a 16-bit CPU? Because that’s how Intel marketed it. The 8086 is part of “the range of 16-bit processors from Intel” (see for example Introduction to the iAPX 286, page 3-1). The 8086 Primer says “In 1978, Intel introduced the first high-performance 16-bit microprocessor, the 8086.” The 8086 Family User’s Manual isn’t quite ...


16

was there a risk that the user program had left the stack pointer close to wrapping round, so that the interrupt itself (which pushes three words onto the stack) or the code running in the interrupt would overwrite part of the stack segment? Yep. The 8086 required space to put 6 bytes on the stack: The processor status The current instruction pointer The ...


15

This is not a complete answer because it doesn't answer what the exact cost savings were, but I think it's worthwhile to have an informed primary source for the claim that there were cost-savings and commodity-components motivations behind IBM's choice to use the 8088 instead of the 8086. Peter Norton, PC guru and DOS programmer extraordinaire, writes in his ...


14

In addition to the i8087 & i8089, intel had the i80130 and i80150 "Operating System Coprocessors". These were single-chip bundled timers and irq controllers that had a subset of the iRMX-86 ('130) or CP/M-86 ('150) in ROM.


14

As I mentioned in my comment, IBM's BIOS also used interrupts for service dispatch when it could have easily chosen a well-known address as a ROM entry point (such as how a soft reset was programmatically available by jumping to FFFF:0000). I'm speculating, but Microsoft might have been following IBM's lead. Also, triggering an interrupt only takes two ...


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