65

Was there some particular design theory or constraint that made a 36 bit word size attractive for early computers? Beside integer arithmetic, 36 bit words work quite fine with two different byte sizes: Six and nine. Six bit was what's needed to store characters of the standard code for data transmission at that time: Baudot code or more exactly ITA2. As ...


44

I imagine representations other than two’s complement (ones’ complement, sign/magnitude...) declined in popularity because two’s complement is simpler to implement; in particular: addition, subtraction, and multiplication of two signed input values of length n can use the same implementation as the unsigned variants, modulo 2n; zero only has one ...


43

PDP-10. It had a very orthogonal instruction set based around mnemonics with suffixes, and depending on the operation, sometimes no suffix meant a NOP. http://pdp10.nocrew.org/docs/instruction-set/Arith-Tests.html


21

36 bit word size attractive Many sizes have been tried, but fundamentally, this results in a certain precision; from Wikpedia on 36-bit Early binary computers aimed at the same market therefore often used a 36-bit word length. This was long enough to represent positive and negative integers to an accuracy of ten decimal digits (35 bits would have ...


20

The 5100 had programmable microcode which could be used to implement crypto-specific opcodes1,2,3. Then there's the whole John Titor4,5 thing... 1 Such as population count 2 I'm unaware of anyone actually having done so. 3 Certain agencies are very interested in such things though. 4 Perhaps it wasn't code-breaking in the traditional sense. If you have ...


18

One could just as easily ask why it was not extended to 64 bits, or even wider. Well, if you ignore backwards-compatibility and cost, yes, it could have been. I'll pretend we can ignore backwards-compatibility and concentrate on cost first. Making the data pathways 32 bit would immediately double the number of transistors, with a corresponding doubling of ...


17

The key point made by Wikipedia seems to be: Prior to the introduction of computers, the state of the art in precision scientific and engineering calculation was the ten-digit, electrically powered, mechanical calculator....Computers, as the new competitor, had to match that accuracy.... Many early computers did this by storing decimal digits. But when ...


16

Two's complement is generally simpler to implement in hardware than ones' complement, except for one thing: if one wants a "live" readout of register values using one set of lights for positive numbers and one set for negative numbers (blanking whichever set isn't appropriate) that can be accommodated very cheaply and easy with ones'-complement using one ...


16

But I find that modern day examples of computers that use ones complement rather hard to come across. I can only think of the Unisys Clearpath here - and even they are Itaniums at hardware level by now. The C standard is obviously written with one's complement machine in mind; for example, it specifies that a signed integer may hold values -32767 to +...


12

Wiki page 36-bit shows some reasons (all copied from the page): "This was long enough to represent positive and negative integers to an accuracy of ten decimal digits (35 bits would have been the minimum). It also allowed the storage of six alphanumeric characters encoded in a six-bit character code. " And for characters: six 5.32-bit DEC Radix-50 ...


12

Support for byte writes throughout a memory system is expensive. Among other things, if one wishes to use error-corrected memory that can correct single-bit errors, a memory that can be written in independent 8-bit chunks byte-writable memory will require four extra bits per octet, or 16 bits per 32-bit word. A memory that is limited to writing 16-bit ...


11

I'm going to address the power of 2 part of the question. Keep in mind that before microprocessors, computers were assembled by hand. Increasing the number of bits in a computer was really a big deal. Each time you added one bit to the word size, you would need more parts in the register file more parts in the ALU more wires in the buses more cells in ...


11

It seems most CPU designs favored CISCish instruction sets that accumulated a lot of propagation delay on the long combinatorial logic paths needed for that. Which usually limited the overall CPU clock to a small fraction of the "raw" speed of the ICs used. First of all, CISC doesn't require longer combinatorial delay. If at all, it usually results in more ...


11

"A Retrospective on MIPS: A Microprocessor Architecture", authored by those that designed MIPS from the beginning, states: The absence of hardware interlocks (to delay an instruction if one of the operands wasn’t ready) was a tradeoff... [...] The team wanted to pick a name for the project that emphasized performance. About nine months earlier, ...


11

Apart from anything else, Alpha was the VAX replacement - indeed, it was internally called EVAX. It would be necessary to take VMS source code written in VAX MACRO-32 assembler and compile it into Alpha machine code. VMS had a lot of dependency on 32-bit words. MACRO-32 code was explicit about length. Higher-level code, in BLISS-32, tended to be explicit ...


9

Yes. In fact, it is a very simple system in machine language terms. The key to understanding the system is to look at the physical construction of the part you saw. This is what we would today would call the accumulator. It holds a single mathematical value. You can see it consists primarily of several vertical rods with gears spaced out along them. Each ...


8

Can S-100 cards attach to the ZX machines? That calls for a clear Yes, But :) S-100 closely matches the same signals as the Intel 8080, as does the Z80 which the ZX Spectrum etc., have. Adding a basic S-100 bus bridge for the ZX80/81 or Spectrum would in fact be no big deal - only some money to spend for bus board, cage, PS and so on. It would become a ...


8

The MIPS architecture was introduced in 1981 Are you sure? To my information the first MIPS implementation was of 1985 with the R2000. Of course, the project did start before (in 1981), but so did others. It is my understanding that VLIW architectures which also have an exposed pipeline, came later. Is that true? As far as I can tell, yes. Was MIPS ...


8

For the OCS, one big reason was chip package cost. Up to 40-pin DIP packages for the chips were the only ones in the consumer price range at the time the Amiga OCS was designed. Other chip packages with more pins (enough to allow a 32-bit bus) were several times more expensive, as they were meant for mainframes and aerospace applications. For later ...


8

Although this isn't the processor you're thinking of, another example is that of early ARM chips, which allowed all instructions to have a condition field, the default being AL (always), and also included NV (never). The NV condition was however deprecated/removed in later chips. See for example: http://infocenter.arm.com/help/topic/com.arm.doc.ddi0027d/...


6

Partial answer: If you compare the PDP-11 calling convention using a stack as described e.g. here ! parameters passed on stack ... mov parm1,-(sp) mov parm2,-(sp) jsr pc,subr2 add #4,sp ! adjust stack to remove parameters ... ! subroutine called with parameters on stack subr2: mov ...


6

I think the original argument (both in the John Titor hoax and in Steins;Gate) goes like this: The IBM 5100 can emulate the IBM mainframe ISA (that's true, and that's how the APL running on the IBM 5100 was implemented: They took the mainframe APL implementation, because they didn't have enough time to develop a native APL. That also makes it slow...), and ...


5

First RNS machine seemed to be tube-based EPOS (Elektronický Počítací Stroj) made around 1963 in Czechoslovakia. The successor of that machine, EPOS-2, was transistorized and was built around 1973. In USSR, there was Т340А machine, built also around 1962 and used for prototyping radar station machines. Later that machine turned into production К340А system,...


4

Not quite an answer but an observation. While ones' complement machines are now almost extinct, ones' complement computations are still here, and in large scales. Every IPv4 packet header has a checksum, that is calculated exactly as ones' complement sum of 16bit words of the header contents. Same with TCP and (optionally) UDP packets, where the whole ...


4

A 74F... or 74S... type TTL gate or flipflop ... will be able to handle 50..70 MHz raw signals 74F and especially 74S are consuming a lot of power. Integrating them into CPU core is a problematic task. Heat dissipation increases with the speed of operation (switching speed), thus there must be a trade-off between size of the die, performance of the core and ...


4

It's a very handy feature for linked lists (*1). One can access the last entry of a linked list in a single machine instruction, as if it was used directly. Examples: Lets assume a list of blocks, where data always has to be added to the last one - like in a high throughput logging, where one (or more) tasks add data and another one writes it to disk. ...


3

1: Why is it half? Erm, half as in halving like in divided by two (aka shifted by 1)? As described it's a word address, not an address of a word (or a byte address). (*1) The example does illustrate this quite well by coming up with the (byte address) 8224, which turned into a word address (4112, exactly half, isn't it?) is to be stored in the register. ...


3

One's complement requires different operations for signed integers than for unsigned integers. With two's complement, ADD and SUB are the same for both number types, except for overflow flags, so typically, a CPU sets both an unsigned overflow and a signed overflow flag for each ADD or SUB and this is easier than making 2 kinds of ADD and 2 kinds of SUB. ...


3

When I was first exposed to this stuff in engineering school in 1978, I was taught that a "byte" could be either six or eight bits; the former were usually represented as two octal digits, and the latter by two hex digits. Most of the computers I used in college (PDP-8s and a CDC 6600) were based on six-bit bytes. There were quite a few computers using odd ...


3

I can give you an overview of the external control signals that appear on the pins of the 6502, but you'll need to go to somewhere like visual6502.org to get an idea of the internal signals. There are three control signals dedicated to the clock ø0 ø1 ø2 The first is an input, the system clock. ø1 is an output: ø0 inverted but with the high pulse slightly ...


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