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Was there some particular design theory or constraint that made a 36 bit word size attractive for early computers? Beside integer arithmetic, 36 bit words work quite fine with two different byte sizes: Six and nine. Six bit was what's needed to store characters of the standard code for data transmission at that time: Baudot code or more exactly ITA2. As ...


43

PDP-10. It had a very orthogonal instruction set based around mnemonics with suffixes, and depending on the operation, sometimes no suffix meant a NOP. http://pdp10.nocrew.org/docs/instruction-set/Arith-Tests.html


21

36 bit word size attractive Many sizes have been tried, but fundamentally, this results in a certain precision; from Wikpedia on 36-bit Early binary computers aimed at the same market therefore often used a 36-bit word length. This was long enough to represent positive and negative integers to an accuracy of ten decimal digits (35 bits would have ...


17

The key point made by Wikipedia seems to be: Prior to the introduction of computers, the state of the art in precision scientific and engineering calculation was the ten-digit, electrically powered, mechanical calculator....Computers, as the new competitor, had to match that accuracy.... Many early computers did this by storing decimal digits. But when ...


12

Wiki page 36-bit shows some reasons (all copied from the page): "This was long enough to represent positive and negative integers to an accuracy of ten decimal digits (35 bits would have been the minimum). It also allowed the storage of six alphanumeric characters encoded in a six-bit character code. " And for characters: six 5.32-bit DEC Radix-50 ...


12

Support for byte writes throughout a memory system is expensive. Among other things, if one wishes to use error-corrected memory that can correct single-bit errors, a memory that can be written in independent 8-bit chunks byte-writable memory will require four extra bits per octet, or 16 bits per 32-bit word. A memory that is limited to writing 16-bit ...


11

I'm going to address the power of 2 part of the question. Keep in mind that before microprocessors, computers were assembled by hand. Increasing the number of bits in a computer was really a big deal. Each time you added one bit to the word size, you would need more parts in the register file more parts in the ALU more wires in the buses more cells in ...


11

Apart from anything else, Alpha was the VAX replacement - indeed, it was internally called EVAX. It would be necessary to take VMS source code written in VAX MACRO-32 assembler and compile it into Alpha machine code. VMS had a lot of dependency on 32-bit words. MACRO-32 code was explicit about length. Higher-level code, in BLISS-32, tended to be explicit ...


8

Although this isn't the processor you're thinking of, another example is that of early ARM chips, which allowed all instructions to have a condition field, the default being AL (always), and also included NV (never). The NV condition was however deprecated/removed in later chips. See for example: http://infocenter.arm.com/help/topic/com.arm.doc.ddi0027d/...


3

When I was first exposed to this stuff in engineering school in 1978, I was taught that a "byte" could be either six or eight bits; the former were usually represented as two octal digits, and the latter by two hex digits. Most of the computers I used in college (PDP-8s and a CDC 6600) were based on six-bit bytes. There were quite a few computers using odd ...


3

I can give you an overview of the external control signals that appear on the pins of the 6502, but you'll need to go to somewhere like visual6502.org to get an idea of the internal signals. There are three control signals dedicated to the clock ø0 ø1 ø2 The first is an input, the system clock. ø1 is an output: ø0 inverted but with the high pulse slightly ...


3

I'd just go with the datasheet (Rockwell version, Commodore Version) as it contains everything needed. But there is THE book to read: The MOS MCS6500 Family Hardware Manual One hint, in all respect and seriousness, if you have a hard time to give the signals a basic meaning (as noted in your comment), then simulating a CPU might be above your level.


3

One's complement requires different operations for signed integers than for unsigned integers. With two's complement, ADD and SUB are the same for both number types, except for overflow flags, so typically, a CPU sets both an unsigned overflow and a signed overflow flag for each ADD or SUB and this is easier than making 2 kinds of ADD and 2 kinds of SUB. ...


1

Computers used to be all sorts of varying standards for varying reasons. When only large businesses could afford a computer, they bought or designed a computer for the reasons they needed. Thus, there were systems including 4, 6, 8, 13, 16, 18, 24, 26, 32, 36, etc. There have been computers using binary and trinary (ternary). Eventually, due to the ...


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