Skip to main content
46 votes
Accepted

Why did Intel abandon unified CPU cache?

I’m not sure the separate cache was “obviously better” back when the Intel designers were working on the 80486, at least, not to the designers in question. But “better” might not even have been much ...
Stephen Kitt's user avatar
40 votes
Accepted

How did SmartDrive work?

How SMARTDrive works depends on the version being considered. The general idea of a disk cache like SMARTDrive is to intercept disk reads and, optionally, writes, and handle them from cache if ...
Stephen Kitt's user avatar
25 votes

Why did SMARTDRV have to be started with /x when DOS started?

It's quite simple: write-behind caching means that after you have (for example) saved a file in a word processor, the saved file may live in the cache in RAM for a while before being written to the ...
Mike Spivey's user avatar
25 votes

What is the history and development of memory caching?

The concept of cache memory was formalised by Maurice Wilkes in his 1965 paper, Slave Memories and Dynamic Storage Allocation. This describes a hierarchical memory setup with a small amount of fast ...
Stephen Kitt's user avatar
23 votes

Why did Intel abandon unified CPU cache?

Stephens Answer already carries most implications, so this is merely an add-on. First to keep in mind is that the 68k was way more in need of a cache than x86 CPUs, as its memory access was in line ...
Raffzahn's user avatar
  • 225k
19 votes

Why did SMARTDRV have to be started with /x when DOS started?

The /X flag was specified by default in MS-DOS 6.22 at least. (See further down for the detailed history.) What /X does is disable the write-back cache in all cases. The write-back cache is used to ...
Stephen Kitt's user avatar
18 votes
Accepted

What is the history and development of memory caching?

Preface: This focuses on real machines, available as production units, not prototypes or experimental designs. Nor are the examples exhaustive. I will also spare any discussion of memory hierarchy but ...
Raffzahn's user avatar
  • 225k
16 votes
Accepted

What was the first x86 CPU to use a cache of any kind?

The 486, introduced in 1989, was the first x86 CPU to include a cache. It added cache-supporting instructions to the x86 ISA such as INVD and WBINVD. The 386 didn’t have an on-board cache, but it ...
Stephen Kitt's user avatar
11 votes

Why did SMARTDRV have to be started with /x when DOS started?

There is no “shutdown” process/command in DOS. You just cut the power at the end of your work. That was fine when PCs were simple, your storage options was either One Floppy or Two Floppies, and DOS ...
Euro Micelli's user avatar
  • 2,805
8 votes

How did StorageTek STC 4305 use backing HDDs?

I believe your characterization of the 4305 is (at least sort of) mistaken. At a system level, the 4305 probably was used to cache frequently used data. But according to Storage Tek, it really did act ...
Jerry Coffin's user avatar
  • 5,125
6 votes

How does POST memory test work on a relatively modern (2000s) PC? Does it still test every single byte like on older ones?

Because dynamic RAM's switch-on contents is random, the memory of a computer needs to be brought to a defined state anyways. The clearing (and clear-check afterwards) is and was also the method of ...
tofro's user avatar
  • 35.2k
5 votes

What was the first x86 CPU to use a cache of any kind?

(Regarding 80286 and in addition to Stephen's Answers) While the 286 didn't have an on chip cache, some high end machines did add one. Similar for accelerator boards for 8088 PCs. The issue here is ...
Raffzahn's user avatar
  • 225k
5 votes
Accepted

MC68030: does execution resume during or after cache burst refill?

According to the official 68030 User Manual, the '030 performs cache burst fills in critical-word-first order specifically to get the execution units running again. However, accesses to the remaining ...
Chromatix's user avatar
  • 16.8k
3 votes

How did StorageTek STC 4305 use backing HDDs?

TL;DR: Yes, But. It is a fixed disk (*1) with a buffer RAM of the same size as the disk. Thus the full content is held in RAM, served from RAM, modified in RAM and written back to fixed disk. From a ...
Raffzahn's user avatar
  • 225k
2 votes

Can someone clear up principles of CPU caching and pipelining simply and precisely?

Cache Is this about right? How many CPU cycles are going to waste for a RAM access today? Firstly, memory accesses are very slow. Processors typically operate a much higher speeds than memory ...
JeremyP's user avatar
  • 11.7k
2 votes

What is the history and development of memory caching?

Cache in minicomputers. I received a DEC PDP-11/45 in Summer of 1972. The 45 had core memory slots in the backlane as well as, I believe, 4 slots for fast and expensive (semiconductor) memory runing ...
Harvey's user avatar
  • 21
2 votes

Why did Intel abandon unified CPU cache?

One problem with a split cache is that it will require either that the code cache include sufficient logic to guarantee that if code writes to a region of memory and then jumps there, the CPU will not ...
supercat's user avatar
  • 37.1k

Only top scored, non community-wiki answers of a minimum length are eligible