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30

The short answer is yes, starting with version 2.0 and even more so with Warp, OS/2 was a viable alternative for daily DOS and Windows tasks, up to and including Windows 3.x. Starting with OS/2 2.0, the first 32-bit version, OS/2 included very, very good support for DOS programs, including protected-mode and some measure of direct hardware access. This ...


22

There are a few incompatible changes, but after the 68010, most of them are surmountable (with a performance penalty) or would only affect operating systems, not applications (at least, not applications written to spec, with no invalid or undocumented opcodes or addressing modes). 68010: introduced support for the MC68451 MMU; “MOVE from SR” became ...


15

The 68k family is largely compatible between all the members. "Normal" application code can be written to easily run on all the members, unchanged. There are, however, a number of subtle differences and pitfalls to watch out. Some instructions were made privileged after the 68000/68008/68010, so are only accessible in supervisor mode (notably MOVE SR,<...


15

The Intel 387 should work fine with an AMD 386DX; the latter was a direct clone of the Intel 386. The extra rows of pins are perfectly normal — see this photo for an example. (The extra pins were used for Weitek 3167 co-processors.) I'm not sure AMD ever produced their own 387; various on-line collections document the AMD 287, but not the 387. See here or ...


14

In short: not very. Older versions of Xenix are based on V7 or System III (which are very similar to each other). They had the bourne shell, and large parts of the standard library were already available, e.g. stdio, malloc, alarm, lseek, getenv, but they were lacking many things you'd take for granted: there was no networking beyond serial ports, no ...


14

Seemingly there is an entire page dedicated to this (by the MSX wiki). Most of the time, programmers programmed code like how they usually did with the Commodore 64 and ZX-Spectrum and completely ignored the standards made by MSX computers at the time due to the brand new concept of "home computer standard": The main reason why we see compatibility ...


12

The famous poke -1,x depends on each computer's slot configuration. The general formula is poke -1,((peek(-1)xor&hff)and&hf0)*1.0625. This is copying the high nibble of the secondary slot selection register into the low nibble. And why is this necessary? Sit down and relax. Slots in MSX1 The original 1983 specification of the MSX system allowed for ...


9

The SPC700's instruction set is derived from the 6502's, but moves the instructions around and adds a few. But is it fully backwards compatible? No. At least not fully. The instruction set is mostly like a 65C02, but a few instructions (like BIT) are missing. Also, not all inner workings are the same (*1). Assuming that the program fully separates data ...


8

In the USSR, the analog TV sets used SECAM, not PAL, so I imagine that the timings will be different between the UK Spectrums and the Leningrad. SECAM is, like PAL just the colour encoding and on top of the basic B&W TV signal. Basic timing is therefore not touched. It's just about how colours are put ontop - which is done in the modulator circuit anway,...


7

The laptop you describe is unlikely to be able to support USB ports, for hardware reasons. But there may be an alternative solution. The first USB standard (version 1.0) was published in 1996, but didn't really gain traction in the PC market until version 1.1 was released in 1998. The PCI bus standard had been published in 1992, and by the mid 1990s it was ...


7

AMD 80386 chips are die-identical to Intel's, as AMD cloned the Intel 386. So, putting an Intel 80387 (or ULSI 80387 or IIT-387) will do fine, as long as their speed is equal or faster than the main CPU.. The row of socket pinholes is, efectively, for the less standard Weitek 3167 coprocessor, which was not binary compatible with the 387.


6

In addition to the other excellent answers, sometimes the addition of caches could cause incompatibility. The 68010 had a single instruction cache that couldn't really cause any problems. The 020 increased this to 256 bytes, and later CPUs had both instruction and data caches which were even larger. The main fault encountered with instruction caches is ...


6

I recently installed OS/2 Warp on a vintage (late-90s) IBM PC 350 with a 200 MHz Pentium MMX CPU and 96MB of RAM. I found that OS/2 Warp works very well for running virtually any DOS or Windows 3.x productivity application, and provides excellent stability, performance, and access to all that glorious RAM and CPU "power" in my vintage PC. However, DOS ...


6

I confirmed this worked as expected, using Am386/DX-40 + Intel 387 co-processor. The trick with the Am386 is having separate clock for CPU/co-processor, as the former runs at 40 MHz and the latter at 33 MHz. The UMC-386 mainboard supports this configuration fine.


6

Leningrad is a primitive and not particularly compatible clone. However, it is pragmatic, so the incompatibilities are not always going to show up. The main differences are due to a completely different way in which timings are implemented in Leningrad, to an extent that I would not personally call Leningrad's circuitry "an ULA clone". I am a coder, so I can ...


5

Beyond the usual TOS compatibility issues which affected all Atari STs, the TT add the following twists: its faster CPU meant that some programs (games) ran too fast; this wasn’t as much of a problem as on the PC since most games used the vertical blank interrupt for timing; its 32-bit address bus meant that programs which used the top eight bits of ...


5

The question is sort of broad, since there are many ways to write software that targets the specifics of ST hardware, and which leads to programmer assumptions that break when the hardware changes even slightly. That said, you identified one of the main issues for games: the faster CPU. Not being able to slow the CPU down to the expected speed of the ST ...


5

But is there any incompatibilities which could keep code written for the 68000 from being run the same way on a later model? Yes. Any 68000 program that used the "move from SR" instruction in user mode will trap on any later version of the processor from the 68010 onwards because the instruction was made supervisor only in that processor. This was to ...


4

One can think of the SPC700 as a sort of hybrid 8-bit processor that tries to be a 6502, 65816 (16-bit) and Z80/80x86 (decrement-and-loop type instructions). As such it does not fit nicely to any of the individual processor architectures. It uses Z80 (and 80x86) style half-carry/DAA/DAS BCD semantics rather than a decimal mode (making it differ from 6502/...


3

To start with, the 68040 integrated the FPU and dropped some (68881/68882) instructions. Similarly, the 68060 dropped in addition some 68020 instructions. All of these changed/dropped instructions could be emulated on either CPU via dedicated traps. For CPU32 and 5200 (Coldfire) core based controllers the case is different and code may need to be reworked, ...


2

A completely different approach is to find an Ethernet card instead and use any available network resource (like a NAS or a Windows share on another host or the internet). I used 3com and xircom cards back then. You can use Win95 or a small 486 Linux distribution without too much elbow grease, and it will probably be the fastest in terms of moving data ...


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