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46

The reason for any higher frequency supply is almost always the same: you get to convert a single input to different voltages for less wasted heat in a smaller volume. Such systems were very common in applications where you have lots of different voltages downstream from the plug. The first small version I'm aware of was the motor-generator sets used for ...


29

There were 64 data bits and 8 check bits. It seems to me by the nature of parity, it should suffice to have one bit of overhead per word, rather than eight. [...] What you refer to here is a simple single bit parity. Basically counting the number of ones (even parity) or zeros (odd). Such a mechanism can only detect an odd number of bit flips (1 or 3 or 5 ...


25

I'm not sure that in 1986, the state of the art used 400 Hz as a frequency for timing the signals and the circuits. The 400 Hz is not related to any kind of timing. It's about getting size and losses of transformers down. With increasing frequency, the efficiency of transformation increases, thus producing less waste heat. At the same time sizes of the ...


22

It is important to keep in mind that the Cray company name not only went through several hands, but it also built many vastly different machines. 'Classic' Cray machines in lineage since Cyber/CDC did not use nor support virtual memory. This goes all the way until 2003's Cray X1. In 1993 the T3D of Cray Research Inc (Without Seymour Cray involved *1) ...


12

After the first Cray-1 was built, some calculation determined that the time between failures would be greatly extended by having a single-error-correction-double-error-detection (SECDED) without much cost in speed. The point is that with large memory, random single bit errors occur every few hours; with SECDED, it's every few years or so.


10

The Cray you're describing there is nothing but a block of pure processing power. You're not describing any sort of input or output, so the question is very vague. You could put any sort of rendering front-end onto a generic computer like that: Older 8-bit home micros could have bitmap modes, or tile modes with sprites, or some combination of these, making ...


9

The book Super Computers, by V. Rajaraman (of 1999) says Cray computers, however, never provided a virtual memory system, as Cray designers were convinced that the virtual memory's disadvantages outweight its advantages. They try to provide as large a main memory as possible within the technological constraints prevailing at a given time. I am with that -...


8

The claim that Cray supercomputers still did not support virtual memory in 2011 is not true. For example, the Cray X1 System Overview, dated 2002, states that the system supports virtual memory (page 29 and elsewhere). Cray vector supercomputers, including the machines designed by Seymour Cray himself, did not support virtual memory. For example, Dennis ...


8

The Cray needed stable DC power at extremely high current. By using a 3-phase 400 Hz system they could use high frequency transformers in each power supply unit to generate 12 phases** which results in very little ripple voltage (about 1%) at relatively high frequency (4.8 kHz), so they did not need to use enormous capacitors (which wear out). The ...


8

As others have said, the choice of a higher frequency enables smaller transformers, but also smaller smoothing capacitors. 3-phase supplies were used to reduce the ripple even further. Don't forget we are talking about very high currents with ECL systems. Motor generators existed right from the earliest days of electrical distribution for AC-DC or DC-DC ...


8

In part the design was made for show effect. Reduction in wire length had only a minor influence, especially as it's only present in one dimension. Cray 1 at the Deutsches Museum in Munich (Image taken from Wikipedia) Mainframe circuit boards are connected via a hand wired backplane. In theory, arranging them in a circular fashion may save about 20% (*1) ...


6

There are two computers meeting your definition: the CDC STAR 100 and the TI ASC, available in 1974. Both of these are memory-based vector computers, capable of issuing vector operations on data stored in memory, and storing the results in memory. The STAR could operate on vectors of up to 65,535 elements. Both systems could operate on double-precision ...


5

The inside edge of the C contained the Cray's backplane, where the various segments of the machine were electrically connected. Minimising the length of this would have reduced electrical interference and signal propagation times. The Cray-1 also needed a lot of cooling due to the type of electronics used to implement it; the extra space between the ...


5

In addition to earlier answers, stating smaller transformers, less ripple on rectified voltage and motor-generator inherent momentary power losses sustainability, such a seemingly overengineered system also protects well from (rare) power line surges, which increases the machine stability. Some of such surges could pass rather well through inter-winding ...


5

The extra bits are used to allow for error detection and correction (EDAC). This scheme is described in detail in: Cray 1 Hardware Reference Manual at page 5-5 (~168) The use of EDAC in the Cray-1 is rather ironic given that Seymour Cray is (in)famous for once saying Parity is for farmers. Which I think is a reference to farm subsides in Europe.


5

Your assumption that Cray computers were designed solely for floating point operations is incorrect. The Cray 2, at least, supported a variety of integer and logical operations in its vector processors, including population count, which I understand is the critical operation for high performance cryptographic operations. See page 6 of this document for a ...


5

is there one functional unit per segment? You can find the chassis ("segment") layout on page 2-3 of the Cray 1 Hardware Reference. As you can see, the middle sections contain the functional units, and the left and right sections contain storage. but what is a module? Module types are listed in Appendix B of the above reference manual. With names like "...


4

In my opinion, the accepted answer from Raffzahn has this question inside out. Anyone who has ever worked with ECL logic knows that the cooling system for current-mode VLSCI is not a bolt-on afterthought (very-large-scale crochet integration). In the Cray-1 design, back corners of the boards are almost directly adjacent, so the wire length is determined by ...


3

The NSA used vector processing because it lets you parallelize attacks on a symmetric cipher. This is because a single instruction operates on multiple data in different vectors. As an example, COPACOBANA is a vector architecture that breaks DES by brute force, which is exactly how the NSA would have used a vector processor. However, this would still have ...


3

The Cray is not a home computer that deduces timing from the mains frequency - This is a shortcut cheap computers could take to save some components, but nothing that was done in the "professional" world. In a sufficiently professional computer (and the Cray, if anything, is one...), there is no coherence whatsoever between mains frequency and internal ...


2

A very large portion of the Cray 1's logic was designed for exactly 6 logic gates and 4.5 feet of wire between registers. That was more easily done by shortening all the wire paths to be on the inside of the cylindrical arrangement. The greater outer circumference allowed more room for the power bars and thermal management necessary to supply and remove 0....


1

Another candidate, designed from 1972, prototype building started in 1974 was the ICL Distributed Array Processor (DAP) with a 64 * 64 bit SIMD architecture. First was shipped in 1979, (or perhaps 1978) and Edinburgh University had one around the same time (1980ish). As I understand it, its 4096 Processing Elements (PEs) were 1-bit each, arranged as a 64x64 ...


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