114

Why is ASCII this way? First of all, there is no one best sorting order for everything. For example, should UPPER or lower case be first? Should numbers be before or after letters? Too many choices, and no way to please everyone. So they came up with specific pieces that "made sense": Numerals 0x30–0x39 - Easy bit mask to get your integer value. ...


61

According to ASA X3.4-1963 Appendix A, one of the design considerations was: (7) Ease in the identification of classes of characters Furthermore: A4.4 The character set was structured to enable the easy identification of classes of graphics and controls. And on page 8: A6.3 To simplify the design of typewriter-like devices, it is desirable that ...


47

Why is the clock frequency of the PS/2 keyboard protocol so high? I wouldn't call it high. It's quite in line with similar keyboard speeds - like Amiga operating a 17 kHz. At 11 bits per scancode, 10 kHz is a massive 909 scancodes per second. World-record holder Barbara Blackburn peaked at 216 wpm ≈ 18 cps ≈ 54 scancodes/sec. on a Dvorak keyboard layout. ...


34

What reasons would CPU designers have for choosing these different approaches? It depends on what the designers intended to mark a valid bus cycle, which is the 'leading' signal for decoding. In a more general way, it's the design view of the bus. Common ways (*1) are: The 8080 way - Marking a cycle by a one of several (*2) dedicated signals marking the ...


27

man 7 ascii of Linux Programmer's Manual says, Uppercase and lowercase characters differ by just one bit and the ASCII character 2 differs from the double quote by just one bit, too. That made it much easier to encode characters mechanically or with a non microcontroller-based electronic keyboard and that pairing was found on old teletypes. As ...


25

The user will perceive a delay (latency) between pressing a key and seeing the computer react. The reactions are usually on its screen, such as displaying a typed character or motion in a game. This delay must be kept short for the user to have a feeling of sharpness in the computer's reactions. The delay is the sum of (a) the keyboard scanning interval and ...


16

This chart (showing the hexadecimal values of ASCII characters) outlines manassehkatz's answer graphically: Numbers are at 0x30 + the value of the number Capital letters are at 0x40 + the value of the letter (A=1, B=2 etc) Lowercase letters are at 0x60 + the value of the letter.


15

Because there were spare pins otherwise. Because sometimes this could make the design simpler. As an example, I'll put again schematics of a russian ZX clone, for example this one, named "Leningrad". All other clones with single DRAM set are made in a similar way. The inputs of DRAM chips (D21..28, labelled as 565RU5 -- russian analog of 4164) are ...


14

[Insert: Some site history While the German subsidary (Commodore Büromaschinen GmbH), originally set in Neu-Isenburg near Frankfurt, had facilities for import handling and distribution, this was soon moved to a distribution center in Braunschweig and accomplished by a final assembly line and a development center. At the same time the company moved into ...


10

15.667 Mhz is about 2% less than 16 Mhz. So for purposes of "multiple of max. MC68000 frequency", it is close enough. The Mac wasn't competing based on being the fastest machine, so 2% was just not a big deal. And most of the competition was either older 8-bit or Intel family, not MC68000. In fact, the 8088 in the original IBM PC was clocked at 4.77 Mhz, ...


10

Given that those files are not regular executables, why were they given the COM extension in the first place? They are executable files. They are loadable binary images. In so far they are exactly like COM files, except, when loaded, they are not loaded at offset 0100h, after a prepared PSP, and started with CS:IP as segment:0100h, but segment:0000h. ...


8

Can anyone explain how separate data inputs and outputs for RAM would be useful for a computer system designer? There are several advantages: Design: Timing is only defined by address transfer No additional requirement for access timing Outputs is static, only defined by address input No specific bus structure required Any bus adaption (latches, buffers) ...


6

Oldstyle ASR-33 teletype machines (telex machines) only handled 7-bit codes. They only handled uppercase English-language characters, the ten digits, and some punctuation. They printed with this little cylindrical print head with a limited number of characters available. Later, tonnage of terminals, both printing and screen-based, came on the market using ...


4

There are three common control-signal patterns for devices that can read and write information: The three-pin control pattern: /CS, /OE, and /WE. Any time chip-select is high, all other pins will be ignored. If chip-select and write-enable are low, /OE will be ignored and the device will write to the indicated address. If chip-select is low, write-enable ...


3

Until communications frequencies get fast enough to cause difficulties, communicating at higher speeds is no more difficult than at lower speeds. It sometimes makes sense to use a speed somewhat slower than the speed one expects to be able to handle easily and reliably, in case things don't work quite as nicely as planned, but the AT protocol used in the PS/...


3

According to the CPC schematic, the Armstrad uses a gate array to generate video, so we'd need to know how this gate array is programmed for an exact explanation. But expanding on the comment of supercat, we can do an educated guess: Assume we have an 8 bit shift register in the gate array, with a tap for bit C0 at the end, a tap for bit C1 in the middle, ...


2

Although most often not used with microprocessor based systems, larger (mini, mainframe) systems often used unidirectional buses, which were easier to terminate to prevent reflections off of impedance mismatches. Long bidirectional buses might require termination at both ends, and heftier bidirectional line drivers to support the termination current. ...


2

I am not an expert in Amstrad CPC at all, however I can see some regularities, for example: Not grouping pixel bits in halves (like pixel 0 takes bits 7..4 and pixel 1 takes bits 3..0) allows one to use single shift register, that always shifts by 1 bit. In mode 2, it shifts 8 times for 8 pixels, in mode 1 it shifts 4 times for 4 pixels, where one pixel is ...


1

Example of a machine that tooke advantage of this The Apple Macintosh IIfx used a special kind of memory modules with separated data input and output lines for all data bits. This allowed the designers to pipeline bus cycles (like continuing a write to RAM while already doing the next transaction on the bus or addressing the RAM while the previous ...


1

The CBM900 came before PC10, the prototypes were sent out early 1984 (I started in Commodore Denmark on august 1st 1984 with half the job being supporting the CBM900). I belive we got the first PC10 prototypes in early 1985, but they were embargoed because the BIOS was too identical to IBM's for legal comfort. The 900 were designed in US, but the ...


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