25

Each of the 68K series CPUs had dedicated address-generation hardware which was wired more directly to the A registers and had only limited access to the D registers. Conversely, the main ALU was more directly wired to the D registers than the A registers. It thus became a performance enhancement, allowing the main ALU and the addressing logic to operate ...


18

I'm one of the developers of the Rekursiv. Its biggest problem was its recursive nature. Basically if a page fault happened while executing a (microcode, recursive) instruction it wasn't possible to abort execution of the instruction, issue a memory fault and switch to a different thread while the fault was serviced. Instead, the entire processor halted ...


11

Does it really have every single chip that any game ever used as hardware inside the Everdrive? Or does it -- shudder -- emulate them somehow? The latter. In the Super Everdrive and SD2SNES cartridges, the majority of the logic of the cartridge is performed by an FPGA. In photos of the boards, these will be usually labeled 'Altera' or 'Xilinx'. By the term '...


10

Most flashcarts (including the Everdrive) use an FPGA to emulate mappers, which is essentially a programmable ASIC -- a developer writes code in a hardware description language specifying the behavior of the chip. So yes, the mapper is emulated -- but at a lower level than if the entire NES was being emulated through software, since it can't "cheat"...


9

Your second and third points are disadvantages from the user’s perspective. Looking at things from the manufacturers’ perspective, SLI has one significant advantage: it raises the maximum number of graphics cards in a single system, which automatically raises the market’s ability to envision buying more graphics cards. SLI started with 3dfx, where it was ...


8

Just plug it in, making sure the red and black wires are the ones on the pins. The connector should be keyed to enforce this. The yellow wire is for monitoring the fan's speed, and isn't required for normal operation. You may need to swap the wires around if the keying doesn't match. This is simple enough: the connectors are held in place by small springs,...


5

The primary advantage of the 68000 segregating address and data registers is the ability to have many instructions use three-bit register-select fields, thus saving opcode space compared with using four-bit fields. IMHO, the ARM Thumb instruction set and derivatives could have benefited from employing such a concept, since otherwise the upper registers end ...


5

It's all about the top end performance. What can be done if the performance needed is greater than the best card available can offer? Right, using two of them, and that's the whole idea of SLI, adding another card to satisfy demand. Quite the same reason why in the mid 90s dual socket workstations kept popping up to satisfy the demand for power, despite the ...


4

The PDP-10 (KA-10 model) is a retro-computer but not a retro-micro-computer. But maybe you'll allow it. A friend in college programmed a few PDP-10 assembly language routines for multi-precision integer arithmetic (aka bignums). He ran it to compute 50000! and Harvey Mudd College's PDP-10 crashed. And wouldn't restart. PDP-10 service was called, they ...


3

The original MSX specification requires the AY-3-8910 sound chip to be included as part of the hardware, and indeed many machines (like the Philips VG-8020/00, for example) were built using that chip. This chip has two 8-bit I/O ports, and the decision of whether a port is an input or an output is made by software. In the MSX, one of the ports is used for ...


3

As per the other answer, in your case the yellow wire is not needed - it's a tacho signal that shows the current fan speed. It is possible to physically plug the new fan into the old connector with only the red and black wires connecting to the board. However the pinout of the fans are not compatible at the moment - the red and black wires are reversed which ...


2

I have Tiny BASIC 1 and 2 source code, for exactly the same reason you described (my own 8080-based computer). Here is a source code and a binary, ready to loaded from 01000h. Serial communication is provided by ACIA MC6850 - see lines 1420 - 1475, routines outc and chkio. ACIA is accessed via 0DEh (control/status register) and 0DFh (data register). So: Load ...


1

Working from memory and in addition to what everybody else has said, the order of the memory access and SP increment/decrement in the push and pop opcodes changed relative to the 8086 and 8088. This was the standard way of checking whether a CPU was an 88/86 or a 188/186. You could distinguish between the 88/188 and 86/186 by using self-modifying code to ...


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