New answers tagged

0

Depends on how powerful your power supply is. Most NMOS chips behave like a big diode from GND to Vcc when polarity is reversed, so weak power supply would simply go into short-circuit protection. If there is 7805 inside the SMD2, there are chances that 7805 will blow, though.


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many aspects of the HW vs SW has been covered by other posts here so I will not touch them. Instead I would like to explain the LATENCY issue from mine point of view along with experience I acquired during coding my emulators for various platforms... Making SW emulator on modern machines is much harder from latency aspect than it was back in the direct I/O ...


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Vintage NTSC machines (and CRT Macs, etc.) can change their graphics output in the middle of CRT display refresh (part way down the vertical raster), thus tearing the image in response to real-time input. Emulators using non-CRT monitors can’t do that in real-time, and can only fake a torn raster the next frame or field. And the only way to test whether an ...


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I'd like to clarify 'FPGA emulation' term mentioned in the question. First, of course there is such thing as software emulation. Let's take as an example some (more or less) exact software emulators of the 6502 CPU. They try to emulate all external artefacts of the real CPU, such as number of cycles per each command, addresses of the memory accesses, and ...


3

To offer an answer on the latency question only, as an emulator author: Exceptions abound but the general rule on original hardware of the '80s and into the early '90s is that joypad and keyboard input changes can be detected by hardware almost immediately after they happen, and that as video and audio is output from the machine it reaches the user almost ...


1

The DEC PDP-8, a 12-bit machine with 4k words of memory, had 8-bit direct addressing (7-bit offset and a 1-bit Page Zero selector). However, an Indirect bit in the order code caused the contents of the directly addressed location to be used as a 12-bit address of the real operand. Later models of the PDP-8 family could have up to 7 more "Fields" ...


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An advantage which FPGA emulators generally share with vintage hardware is the ability to use devices that interact with the hardware in ways that are very timing-dependent. For example, if one has a game cartridge for the NES which triggers an interrupt every time the first line of data for a particular sprite is fetched, a console that reads out the ...


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Preface: The question seams to ask for opinions, as it is opinion if someone accepts an emulation, no matter if software on a CPU or on a FPGA, as the same as the real thing or not. Ask yourself, is driving a modern technology car pimped up to look like an SSK the same as driving the real thing? Do you want to ride a 1950s BMW with all it's sounds, smells ...


2

The well-known IBM 1401 technically had a 7-bit byte (plus parity). It was designed around the common format of IBM punched cards, which it was designed to process; these had ten "digit" rows and two "zone" rows, of which one digit and optionally one zone (for which the zero row also counted as a third zone) could be punched ...


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The second-generation Soviet computer Minsk-32 (the series size is 2889 machines, 1968-75, civilian use, one of the rare early mainframes noted for use in Antarctica) used a 37-bit word and 7-bit representation of alphanumeric characters (5 in a word). Yes, the concept of "bytes" is difficult to apply to a similar old computer (which continued the ...


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The RCA 1802 CPU had only 8 address lines, which were time multiplexed to specify a 16 bit address. It was used in "telly tennis" type game machines in the mid 1970's and early home computers like the COSMAC ELF as well as the Hubble space telescope. Just recently my retired neighbour was regaling me with stories of when he was developing a system ...


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The ADAU1701 is a 28-/56-bit DSP for audio processing. CHAR_BIT is probably 28 on that platform like most odd-sized DSPs but I'm not quite sure since I couldn't find its programming manual


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Yes; there have been several (although, to my knowledge, none in the most simple sense where seven binary bits are treated strictly as as a base-7 system of Peano-like numbers). Instead, they are systems in which at least one (typically, two or three) carry are treated as separate state-modification bits. The most oldest/most simple example (although it may ...


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Not quite there, but close, is the VT52 text terminal with a CPU that has a 10-bit code address space. The data address space is 11 bits. As answered by others, low end microcontrollers may well have 8-bit code and/or address spaces.


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PIC: 7 bit address space The Microchip PIC family of CPUs specifically the 10, 12 and 16 series have 7 bits of address space. While 7 bits is not exactly 8 bits this shows that there are commercial CPUs still on sale and still widely used that have less than 8 bit address space (they are used for example for power management on some Macs and are the most ...


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The Intel 8048 which was used in the Magnavox Odyssey2 had an 8-bit external address bus.


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The KENBAK-1 has 256 bytes of memory. I'm not certain whether it had an 8-bit PC. https://en.wikipedia.org/wiki/Kenbak-1


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The first that comes to mind is Cypress' M8C core used in the PSOC-1 series. While it has a 16 bit program address space (and thus 16 bit jump instructions), its data as well as the register space are each strictly 8 bit. Implementations do use up to two sets of 256 registers and may offer several sets of 256 Byte banks. From the manual: The M8C is an 8-bit ...


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Not strictly an answer, but some early computers had very limited addressing. The Harwell Dekatron computer, which operates entirely in decimal, has an address space of 100 words, of which 90 are RAM and the other 10 are devices. Programs for it are usually run directly from a paper tape device (where the tape, rather than the PC register, is advanced after ...


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The VT52 text terminal certainly doesn't qualify as a full computer, but it does have a processor running software out of a ROM. The RAM holding the displayed text is 2048 7-bit bytes. The character generator ROM is also 7 bits wide.


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The PDP-10 had 'byte instructions' that could process a sequence of bytes of size 1 to 36 bits. The byte pointer was a word containing an 18-bit word address (and the usual index/indirect indications) plus position and size of the byte within the word. It was common to use 7-bit byte sequences for ASCII text, which gave 5 characters per word and one (...


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The Norsk Data ND-505 had a 28-bit address bus.


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Some games uses a pseudo random generator simpler than modern. Gomoku Narabe has a pseudo random generator uses RAM space 0038~003F, iterates once per frame. When fix to 0000000000000000 using cheat, the opening is fixed.


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It was never fully developed in the sense that a complete system was built, but it was made into a card that plugged into the back plane of a Sun 3 system. We had one, and our card is shown here: Ours is now in the (local) Computer Museum . Unfortunately most of the software details are lost in the fog of past memories. However, good information is shown ...


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Hint: It would be great if you could extend your question not only with the number of bombs, but as well the setup and conditions used to produce them. I understand bombs are sort of code indicator of what is malfunctioning in the system, Jup, they are, so it would be nice if you could tell how many you see, as that is essentially the error code. similar ...


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No. The Mac SE vertical and horizontal scan frequencies (designed into both the CRT yoke and the analog sweep generator circuits) are different from NTSC (and PAL) composite timing. And the Mac SE analog board requires separate vertical and horizontal sync inputs, not just a video signal. The analog board sync inputs need to be at TTL voltage levels, ...


6

No, for many reasons. The yellow connector that you are talking about is called composite video. It's called "composite" because it combines several signals: vertical synchronization, horizontal synchronization, blanking, luminance (the black-white part), and chrominance (the color part). No model of Macintosh bothered to combine these signals, ...


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Answer to update on top: While my angle is to create my own computer using TTL chips I am looking at 6502 block diagrams, at PDP-8 ISA and schematics, as the 4004 and TMS-1000. Then you are looking in the wrong place. You should be looking at bit-slice computers that made use of those 74xxx TTL chips, like the Alto, the PDP-11, the Data General Nova, or ...


3

How about the LSI-11/2 (PDP-11/03) that was released in 1975? These machines were in small cabinets you could put beside your desk (not the 6' tall H960 rack). And they were used in process control, science and other fields. It was also available OEM for inclusion into other equipment.


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Full disclosure: I worked on the x87 FPU of a 486-class CPU at a math-coprocessor company in the early 1990s and thereafter worked at AMD, where I was on the 3DNow! design team and the design team for the FPU of the AMD Athlon processor (also known as K7). The x87 FPU never acquired a flush-to-zero mode. In fact, denormal support was one of the major ...


6

Since you mentioned the Amiga in your question, it ought to be relevant as to how this problem was solved efficiently on that system. As I understand, the "glue" logic for the Bridgeboards consisted mainly of 128KiB of dual-ported RAM accessible by both the Intel CPU on the Bridgeboard and the Amiga's 68K. This would be sufficiently large to buffer ...


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This take a little more circuitry than the OP, in that the byte-swapper has to make use of the Function Code bus lines (FC0, FC1 and FC2) to distinguish between data transfers and instruction fetches. Bytes should only be swapped for data transfers; applying byte-swapping to instructions will wreck the execution of software.


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Swapping byte lanes on the physical bus would, in any case, only have an effect on naturally aligned data in memory, which happened to be the same width as the bus. Swapping the lanes of a 16-bit bus doesn't solve the problem for 32-bit data, nor on a 32-bit bus for 64-bit or 80-bit data (the latter being associated with floating point). So that is not a ...


5

Stephens Answer points out most details, I belive it's worth to mention that the 80186 is not incompatible with the IBM-PC's structure/hardware per se. The CPU core works for all details like a 286 in real mode, with the same additional instructions and exceptions, as there are: Instructions: Array Check (BOUND) Integer Multiplication Immediate 8/16 (IMUL) ...


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Short answer: If you are content with beeps, no. If you want arbitrary sound, yes. There's three ways to get sound out of the PC Speaker: Put the timer chip into square wave mode and send frequencies (actually countdowns) to the timer chip. This is cheap and what's used for most PC Speaker sound effects in games. 140Hz is a popular rate to do it at. Set up ...


1

If video was 1st, then printing was a close behind 2nd. Applications needed their own printer drivers to format the application's data for printout, in a language that the printer could understand. There were several families of printers, each family's language somewhat compatible within that family (often with caveats and incompatibilities). Yet many ...


19

That paragraph should be understood in the context of the preceding paragraph: The PC speaker was often used in very innovative ways to create the impression of polyphonic music or sound effects within computer games of its era Effects such as those used in Pinball Fantasies in particular involve very rapid changes to the sound output by the PC speaker, ...


31

The main issue with the 80186 isn’t with the CPU core itself, but with its integrated peripherals: they aren’t compatible with those used in the IBM PC, and they aren’t integrated in the same way either. The IBM PC uses an 8237 DMA controller at offset 0x00 in the I/O address space, an 8259 PIC at offset 0x20, and an 8253 PIT at offset 0x40. The 80186’s ...


9

Yes, the sector size is software-controlled, to a certain extent. Every FDC command involving sectors or tracks takes the sector size as a parameter. The size is specified as a bit shift applied to 128, so sector sizes are of the form 128 × 2n (usable values go from 128 to 4096 on the original PC; there isn’t enough time to fit an 8KiB sector in a track ...


13

But was there anything other than video that was a source of hardware compatibility issues in the first wave? Or put another way: after video, what was the second most common source of compatibility issues for the semi-compatible DOS machines of the first wave? On the software side I'd say sound may lead a tiny bit before any other hardware device - then ...


10

Aspects I recall, perhaps influenced by the area I was working in at the time: Video display (as you mention) Serial ports Timer interrupt I only had to work with "near-compatible" machines a few times before everything went to "100% compatible" for most hardware interfaces.


3

[preface: This question would need a heave rewrite to really qualify as RC.SE compatible, as so far it may mention some historic architectures, but its core questions are about generic system/CPU design, making it rather a fit for EE.SE] Showing other examples won't be of much use, as the question is burdened with unnamed assumptions and restrictions - and a ...


4

Amusingly, I posted about my design for a processor that's as simple as possible while still being useful over on the anycpu forums just this morning... Summarising: My design uses 14 standard chips (including a 16-bit wide ROM for the instruction data which may need to be replaced with 2x8-bit ones depending on availability). It's a very limited design, but ...


11

I would tend to favour "conceptual simplicity" rather than trying to strictly minimise any physical parameter. Observe that some low-cost computers managed to get away with a 1-bit ALU while supporting reasonably wide data words, eg. the PDP-8/S and the LGP-30. They did this using a bit-serial architecture which was largely invisible to the ...


4

You could theoretically create a system with 3-bit words for the Brainfuck programming language. That language is technically Turing-complete, although quite tedious to program. It is a popular language for the Code Golf StackExchange. A processor for Brainfuck needs the following: Memory to store data. Wikipedia suggests a minimum size of 30,000 bytes, ...


4

In 2014 I installed a 65CE02 (removed from an Amiga A2232 serial card) into an Apple IIe, for the purpose of confirming the bug in the 65CE02 decimal subtract, said bug having been discovered by Pavel Zima by reverse-engineering of the chip layout. In general the 65CE02 worked fine in the Apple IIe, but any speedup due to some instructions taking fewer clock ...


0

The processor could access the TMS9918 memory through reading and writing registers on the VDP: Read: write address to specific registers (14-bit address, so 2 regs) read byte from another register (which will trigger read from VDP RAM) Write: write address to specific registers write byte to register (which will trigger write to VDP RAM) The "bad&...


0

ZX Spectrum clone Didaktik Gama has 80KB RAM, there are two top 32KB banks. The BASIC is an almost exact copy of ZX Spectrum 48K BASIC, without any direct possibility to use the other bank. The banks could be switched by OUT 123,0 or OUT 127,1. There are however some subtle differences between the first model and the following ones: Didaktik Gama '87 BASIC ...


5

TL;DR: For example the TI-99/4 system did store all BASIC code and variables within the 9918's RAM. The Long Read: The TMS 9918 acted on its own video memory, seperate from main memory. The memory could be accessed by an external system (aka main CPU) via a port, by setting an address and reading or writing a byte or stream of bytes. There was no predefined ...


6

I assume the main cpu s themselves were not advanced enough to decide when and how to use that spare memory themselves. A CPU by itself doesn't "decide" to use memory for something. That's the job of a program, whether it's running from ROM ("firmware") or RAM ("software"). The examples you give are clearly examples of programs being aware that they ...


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