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74

And if you go back further, e.g. to the ENIAC, you'll see a word size of 40 bits. And if you go back even further, to mechanical calculators, you'll see word sizes determined by the number of decimal digits they can represent. And that explains the approach: Computers originally were meant to automate calculations. So you want to represent numbers. With ...


21

The TLE instruction is a modification of the TLU instruction. TLU (Table LookUp) (Opcode 84) compared a word with a series of consecutive words on the drum and finished as soon as an entry was found being equal or higher. It was meant to find a point in a sorted list. TLE (Table Lookup Equal) (Opcode 63) is a modification of TLU stopping only when equal, ...


20

Longer words mean more bits can be processed at once. An 8 bit processor can perform a 32 bit calculation, but it has to do it in 4 stages of 8 bits each. A 32 bit processor can do it in one stage. Since early computers had limited clock speeds due to slow electronics increasing the word size was one of the few options available to improve performance. In ...


13

A possible answer occurs to me: it might be precisely because of the slow memory. Say you want to add a pair of ten-digit decimal numbers, SUM += VAL, on a 6502. That chip has a BCD mode in which it can add two digits at a time; it has to do everything through an 8-bit accumulator. So we need a loop of five iterations, which we might unroll for speed. Each ...


5

Storing a one-of-two selection using vacuum tube technology doesn't require one valve (combination of an anode, cathode, and one or more grids); it requires two. Thus, holding four bits would require eight valves. Because a one-of-five selection can be held with five tubes, holding a one-of-five selection plus a bit will require seven tubes. Note that from ...


5

This isn't intended as an answer per se, but I want to provide some support for OmarL's explanation by quoting official documentation for the machine, which speaks of binary values as units of information rather than as digits of a base-2 number. Here is how the IBM 650 Customer Engineering Manual of Instruction describes the machine's representation of ...


3

I'd suggest that one issue is that a 1950/60s mainframe was considered to be a significant corporate resource, and by and large enough would be spent on it that it could serve the needs of the entire company as efficiently as possible. The S/360-20 was a reduced-width entry-level system, and similarly DEC etc. minis attacked the mainframe market by being ...


2

The premise isn't entirely true. The IBM 1401, perhaps the most popular computer of the 1960's, used a seven bit word (not including the parity bit). This was a business machine, not a number cruncher. Mainframe computers optimized for scientific and engineering calculations used big words for the same reason that most computer languages of the 21st century ...


1

The 8086 addressing wasn't 20 bits, it's actually two 16-bit components (with a 16-bit ALU); those components being a segment and offset. It sounds like 16+16=32, but the actual location was segment*16+offset, and wrapping around at 2^20 (later chips like 80286 allowed not wrapping, see A20 line) Usually this meant that e.g. for an array, you would allocate ...


1

The early computers were created to do high precision scientific calculations that couldn't be done by hand (practically). The newer computers you mention from the 70s and 80s where business and home computers. And you are mistaken in saying that it was not memmory addressing that motivated the increase in word size from 32 to 64 bits. 32 bits were ...


1

Many early machines processed data in bit-serial fashion, which meant that doubling the word size would reduce the number of words that could be held by a given number of memory circuits, but wouldn't increase the required number of processing circuits. To the contrary, cutting the number of discrete addresses would reduce the amount of circuitry necessary ...


1

Given the small (by today's standards) memory, it was very convenient to be able to include a full memory address within a machine instruction. For instance, Honeywell 6000 assembler instructions looked like this: The first half of the instruction could contain a full memory address, so instructions such as load-register were self contained. The ...


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