58
votes
How does the LOADALL instruction on the 80286 work?
LOADALL is an undocumented instruction available on the 80286, 80386 and some 486 clones. It provides a means to load all the CPU's registers in one operation, including normally-inaccessible ...
- 114k
57
votes
Accepted
How did the Z80 instruction set differ from the 8080?
For the most part the Z-80 extends the 8080 instruction set. If we consider just the 8080 instructions themselves there are a few incompatibilities:
Overflow flag. On the 8080 bit 2 of the flags ...
- 7,311
56
votes
Accepted
What did the 8086 (and 8088) do upon encountering an illegal instruction?
Illegal opcodes were just instructions that hadn't been fully defined by the chip designers – a little like Undefined Behaviour in C, but much more predictable. Many people called these "undocumented ...
- 18.1k
52
votes
Accepted
Why are first four x86 General Purpose Registers named in such unintuitive order?
There are no technical reasons, as any order would work and result in the same amount of gates. More likely it originated in the process by which the 8086 was developed. A main goal was to allow easy ...
- 199k
50
votes
Why did the PDP-11 include a JMP instruction?
MOV changes the N, Z and V flags according to the copied data. JMP doesn't do that. It means you can run e.g. arithmetic operations somewhere, then jump to another location for the compare routine.
...
- 2,554
49
votes
Accepted
How did the 8086 interface with the 8087 FPU coprocessor?
The opcodes in your list are all only 16 bits (plus the extra bytes for address calculation) and you'll notice that they all begin (in hex) with Dx where x >= 8. This is because, to the 8086, any ...
- 11k
49
votes
Accepted
Why does the 6502 have the BIT instruction?
Early MOS documentation (KIM-1 Programming Manual, Synertek SY6500/MCS6500 Microcomputer Programming manual, etc) states:
The BIT instruction actually combines two instructions from
the PDP-11 ...
- 2,131
48
votes
Accepted
Why did the PDP-11 include a JMP instruction?
Besides the flags, and differences in cycle count, the more important difference is that JMP x uses the effective address of x, while MOV x,R7 uses the value at x. In other words, there's one level ...
- 24.9k
47
votes
Accepted
Why does an instruction include the address of the next instruction on the IBM 650?
Very simple: Because there was room for an address and it improves performance a lot. Or as the manual puts it:
It is important, however, for the programmer to realize that the simplest method of ...
- 199k
47
votes
What happened to the SEV instruction on the 6502?
Setting and clearing carry, the decimal or interrupt flags is useful:
the carry flag because the 6502 offers only add and subtract with carry;
the decimal flag because it changes the mode of the ...
- 34.4k
45
votes
What did the 8086 (and 8088) do upon encountering an illegal instruction?
It might be better to think about it this way:
On the 80186 and above, a new thing was defined called an "illegal instruction", and this new thing came with a new behavior -- a #UD exception that was ...
- 11.3k
45
votes
What motivated the weird boolean instruction repertoire of the PDP-11?
What am I missing?
You are missing that in really the majority of real-world cases, and, or and not are used for bitmasks. And you need bitmasks all the time, in particular if you don't have that ...
- 24.9k
43
votes
Why is the processor instruction called "move", not "copy"?
Besides the matter of semantics and personal taste, there’s a much more practical reason: some instructions sets claim to be copyrighted, as the Wikipedia Z80 article states:
Because Intel claimed ...
- 1,567
41
votes
Accepted
What was the main purpose of bitshift instructions in CPU?
Some uses for a bitshift operation:
implementing a more efficient multiplication than repeated adding
implementing division algorithms
implementing an algorithm for exponentiation of integers by ...
- 11k
38
votes
Accepted
What is the relative code density of 8-bit microprocessors?
An instruction set can be considered as a Huffman coding of an idealised instruction stream. So the question is really asking which CPUs have a good balance of short encodings for common tasks to ...
- 10.3k
38
votes
Was leaving all xxxxxx11 opcodes unused on the 6502 a deliberate design choice?
The instruction decode is quite simple on the 6502.
If we call the bits in the opcode byte aaabbbcc, then one of the first things that happens is that cc, the two bits you're talking about, gets ...
- 36.8k
37
votes
Accepted
Why is the processor instruction called "move", not "copy"?
Because "move" is the typical necessary function
It isn't always this way, of course, but especially with earlier CPUs, there were limited destinations for data from a particular operation - e.g., ...
37
votes
Accepted
Have there been any instruction sets with an odd register width?
Below are some architectures with odd word sizes:
Apollo Guidance Computer: 15-bit
Autonetics D-37C Minuteman II Guidance Computer: 27-bit
Electrologica X1, Electrologica X8: 27-bit
Calcomp 900: 9-...
- 3,464
36
votes
Why does the 6502 have the BIT instruction?
I'm having a hard time picturing a use for this [BIT]
It's mainly an I/O issue.
The 6502 is in many ways designed especially for control/embedded applications and BIT is a part of this. 6500 specific ...
- 199k
34
votes
Why are branches relative in many 8-bit CPUs?
TL;DR:
It is all about making one of the most important instructions as performant as possible, while keeping everything manageable for tools at the time (plus a little bit of dogma). The branching is ...
- 199k
26
votes
Accepted
Uses for the halt instruction?
The HALT condition does not (at least on retro CPUs) consume considerably less power than normal execution does.
One very obvious use case is synchronizing program flow with external (hardware) events....
- 30.7k
26
votes
Accepted
What happened to the SEV instruction on the 6502?
There is simply no need for setting Overflow. The same is as well true for Negative/Sign and Zero. No operation will be influenced by any of them, it's only used to signal an overflow during ADC and ...
- 199k
26
votes
Accepted
How did the 6502 ALU perform a decrement?
But how instructions like DEC, DEX and DEY works ?
By adding $FF provided by the precharged internal data bus to the register content.
In Detail:
The internal databus is precharged with $FF during ...
- 199k
26
votes
Accepted
What motivated the weird boolean instruction repertoire of the PDP-11?
I'm not sure what motivated this instruction selection, beyond that it is sufficient, but you may be overestimating the pessimization caused by not having the full repertoire of Boolean instructions.
...
- 5,488
25
votes
Executable ASCII files before x86?
If you go back a lot before the x86, this technique wasn't unusual at all. In fact, writing programs using printable letters and symbols was pretty much the norm for early computers, except that there ...
- 24.9k
25
votes
Accepted
Why does the Z80 include the RLD and RRD instructions?
Per Zilog's Z80 user manual:
Two BCD digit rotate instructions (RRD and RLD) allow a digit in the accumulator to be rotated with the two digits in a memory location pointed to by register pair HL (...
- 34.4k
25
votes
Accepted
Which undocumented 8085 instructions is Steven Morse referring to in "In The Beginning"?
Ken Shirriff has, as so often, a nice table to start with - especially nice to detect the 'undocumented' ones. All opcodes in lower case are 'undocumented'. With sorting his table according to the '...
- 199k
25
votes
Why does the 6502 have the BIT instruction?
A good example would be reading from the floppy drive on the C64. The incoming clock and data signals of the serial bus are (perhaps not accidentally) wired to bits 6 and 7 of port A on CIA#2, ...
25
votes
Why is the processor instruction called "move", not "copy"?
TL;DR
It's all about getting systematic, easy to memorise mnemonics, which may reflect some underlaying structure, but most important ease practical use. Exact language is not always a handy one - ...
- 199k
25
votes
Accepted
Why does the x86 not have an instruction to obtain its instruction pointer?
As Thorbjørn Ravn Andersen already put it nicely:
What would you need it for?
There is almost no practical (*1) need to obtain the PC address at runtime (*2) - it's a value to be obtained during ...
- 199k
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