9
votes
Would compare-and-branch have added an extra cycle on ARM-1?
Remember that classic AArch32 code has conditional execution of most instructions, which more or less demands a condition code register in simple implementations. Once the ARM designers had included ...
- 12.4k
8
votes
Would compare-and-branch have added an extra cycle on ARM-1?
Yes, it would add a cycle.
How do you branch on ARM?
add pc, pc, #8
That's a bit of an over-simplification, but the point is that ARM was meant to be purely orthogonal, that is, the program counter is ...
- 321
7
votes
IMPI Instruction set: is there any reference?
Compilers used outside of IBM (and, most likely, the majority of those inside IBM) did not need to know anything at all about IMPI (internal micro-programmed interface, which is what I assume you mean ...
- 4,594
6
votes
Why does the Z80 include the RLD and RRD instructions?
The other answers all mentioned indeed that it is for BCD operations. What they all forgot to mention is why it is worthwhile to implement these complex instructions. Simply for multiplying/dividing ...
- 3,649
6
votes
Why are first four x86 General Purpose Registers named in such unintuitive order?
Agreeing with existing answers but being too long to shove into a comment, per a recent post on Ken Shirriff’s blog that traced the instruction set from the Datapoint 2200 through the 8008, 8080 and ...
- 35.9k
6
votes
Accepted
Would compare-and-branch have added an extra cycle on ARM-1?
If I remember rightly (I worked at Acorn during the period ARM was designed and built, but I'll admit my memory for causal conversations from that time is far from perfect) the argument was that the ...
- 236
5
votes
Would compare-and-branch have added an extra cycle on ARM-1?
The ARM1 CPU core was tightly coupled to the memory interface - it was designed to be as efficient as possible when paired with FPM DRAM, and no consideration was given to performance with a cache or ...
- 1,164
4
votes
IMPI Instruction set: is there any reference?
This is for the System/38, but it should be similar, and you may be able to find AS/400 versions.
GA21-9331-1_System_38_Functional_Reference_Manual_Feb81
https://archive.org/details/...
- 49
4
votes
Would compare-and-branch have added an extra cycle on ARM-1?
It's not very RISC purist; the designers seem to have been happy to make an instruction do more than one thing,
Erm, RISC isn't about doing only one thing, RISC is about not doing complex stuff. RISC ...
- 213k
4
votes
Would compare-and-branch have added an extra cycle on ARM-1?
The CDC 6400 series of supercomputers, developed by Seymour Cray, are considered some of the earliest RISC-like architectures, having been released in 1964. These used compare-and-branch instructions....
- 8,549
4
votes
Was there a Western computer with blatantly missing instructions in the instruction set?
The Manchester 'Baby' famously had neither 'load accumulator with value from memory' nor 'add value from memory to accumulator'.
Rather, it had 'load negative' and 'subtract'. Nevertheless, these ...
- 33.5k
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