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8

The TRS-80 series is Z80 based, and Z80 uses, like all 8080 offspring (*1,3) a separate address space for I/O. It allows easy decoding for I/O. Thus memory address 0000h is different from I/O address 00h. On logical (program) level, access to either address space is selected by the instructions used. Memory instructions always access memory address space ...


3

Another good example of this basic architecture is the HP2100 series, which had a series of bit-field instructions that performed things like test-and-branch. They could combine up to eight instructions in some cases. This basic idea was relatively common in the few minicomputers I've looked at. The reason they fell out of favor was that they require ...


1

Modern CPU architectures also need to facilitate things like memory protection, so they need to implement restrictions on what machine code can and cannot effect depending on context. You do not want normal application code to be able to mess with other code in a multiuser/multitasking environment, and you certainly do not want it to be able to crash the ...


20

But how instructions like DEC, DEX and DEY works ? By adding $FF provided by the precharged internal data bus to the register content. In Detail: The internal databus is precharged with $FF during PHI2 (*1) During the next phase it's loaded into the B register (signal DB/ADD) At the same time the index register is transfered via SB (*/SB) to the A ...


9

I recently ended up looking into this myself, including reading the programming manuals for both machines mentioned. Some quirks of the RPC-4000 include that the last few addressable tracks of the drum have special fast-access features which change the way the data is laid out. The last track actually has fewer usable locations due to this, so it would be ...


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