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Did any computers of that era, provide such a variant instruction? Kind of, the /360 (1964) implemented a Test and Set (TS) instruction for process synchronisation. A byte addressed was read, tested for zero/not zero (*1) and written back with all bits set (X'FF'). This write back was done not by the CPU in a follow up write access, but by the memory ...


Yes. Sort of. The KDF9 had an accumulator stack (the 'nesting store' or nest) which was mostly made of fast (1µs read, 1.5µs write) core - the top 3 elements were in fast registers, with 16 words of core underneath. Arithmetic was done on the top elements of the nest, popping off operands and pushing the result in the usual manner. Though the top cells were ...


Fairchild F8 There is "add to accumulator" but no subtract. There is "decrement register" but no "increment register" There is "increment accumulator" but no "decrement accumulator"

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