44 votes

Why can't I invoke the next interrupt service by incrementing the AX register after calling the same interrupt?

When calling the mouse driver interrupt with AX = 0, it returns 0xFFFF in AX if a mouse driver is installed. So if it is installed, the code with INC AX will increment AX back to 0 and then it will ...
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  • 17.3k
29 votes

What are uses of the byte after BRK instruction on 6502?

On the BBC Micro, the byte after the BRK instruction held the error number, followed by the error message string terminated with 0x0D. CALLing the address of the BRK instruction would cause an error ...
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  • 551
27 votes

Why can't I invoke the next interrupt service by incrementing the AX register after calling the same interrupt?

Calling an interrupt service is more like invoking a system call than it is like writing to a memory-mapped register. That is, when you invoke a software interrupt, there is no guarantee that the ...
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  • 16.6k
27 votes

How was the real-time clock implemented in the original IBM PC and PC/XT?

Or was the clock maintained in software, and based off of something like the 18.2 Hz system timer interrupt? This is exactly how time was tracked; you can see the implementation of the timer tick ...
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  • 95.7k
23 votes

What are uses of the byte after BRK instruction on 6502?

The BRK instruction on the MOS 6502 seems to be one of the more ill-documented features of the processor. [...] Given the lack of documentation about this It is documented quite well and in depth ...
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  • 168k
21 votes
Accepted

How does single-stepping on the 8086 interact with internal and external interrupts?

It seems the diagrams are not accurate. I wrote a test program that traces INT1 invocations (and delays execution during INT1 to increase the chance of getting hit by timer interrupts) while executing ...
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21 votes
Accepted

How does the BIOS distinguish Interrupt(08h-12h) from INT instructions, vs. actual exceptions inside the CPU?

As mentioned in the 8086/8088 manuals, even if first 32 interrupt vectors were marked reserved for future use, only the first 5 were actually used by CPU exceptions (Divide Error, Single Step, NMI, ...
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  • 17.3k
20 votes

Why do they use CLI in an IRQ routine?

Without issuing a CLI, no further interrupts can occur (until EOI, at least, where flags are restored by the RTI instruction). As this is a raster interrupt, you need to acknowledge that as well for ...
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  • 4,348
20 votes

8086 stack segment and avoiding overflow in interrupts

was there a risk that the user program had left the stack pointer close to wrapping round, so that the interrupt itself (which pushes three words onto the stack) or the code running in the interrupt ...
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  • 10.1k
16 votes

Did the IBM PC use the 8088's NMI line?

In a 100% compatible PC, NMI is used only to communicate unrecoverable errors — normally a RAM parity failure, but possibly something else, which should reveal itself via one of the system control ...
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  • 32.4k
15 votes

What are uses of the byte after BRK instruction on 6502?

The SOS operating system written for the Apple /// used BRK for operating system calls. The byte following the BRK holds the OS function number. Of course, the two bytes after that are also used as ...
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  • 7,591
13 votes
Accepted

Did the VIC-20 support raster scanline tricks like the Commodore 64?

You're correct; the only interrupts on offer in a Vic-20 are those from a VIA — they're plain old 6522s in the Vic-20, not 6526s. The original VIC chip exposes the current scan line via a couple of ...
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  • 32.4k
13 votes
Accepted

What stops an IO device from driving the databus longer than the CPU expects?

An I/O device will monitor IORQ, M1, and the address bus to determine whether to respond to an I/O cycle. As soon as the CPU negates IORQ the I/O device will stop responding. This ensures the CPU is ...
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13 votes

8086 stack segment and avoiding overflow in interrupts

We need to distinguish here between the "stack," which is a data structure in the imagination of the programmer, and what the CPU does with stack registers and the memory pointed to by them, which is ...
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  • 21k
13 votes

How was the real-time clock implemented in the original IBM PC and PC/XT?

Or was the clock maintained in software, and based off of something like the 18.2 Hz system timer interrupt? Exactly that. It is a 32 bit counter incremented by one every time INT 8 is triggered by ...
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  • 168k
12 votes
Accepted

What is the FPD bit on the PDP-10?

The First Part Done bit is used to signal whether a specific part of an instruction (the "first part") is done already or not. It is only set on instructions like ILDB ("Increment and load byte") ...
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  • 28.3k
12 votes
Accepted

Intel 8080 and Altair 8800. 256 I/O ports, but only 7 free RST (interrupt subroutines) — how does it work?

I have looked this video - Altair 8800 - Interrupt Acknowledge Cycle and have few questions (I have read wikipedia Intel 8080 article, Altair 8800 Operator's manual, Charles Petzold "Code" and few ...
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  • 168k
12 votes

Did the IBM PC use the 8088's NMI line?

As indicated by e.g. this description of the Phoenix BIOS, possible NMI sources are Memory parity errors x87 Coprocessor errors I/O card NMI (for whatever reason the I/O card decides to invoke it) ...
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  • 21.7k
12 votes

Did any ZX Spectrum clones use the Z80's interrupt mode zero?

IM 0 is the backwards-compatibility mode with the i8080 CPU. You have to use some external circuit to provide desired RST 0..38h instruction. RST 0 is effectively the same as RESET, RST 38h is the ...
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  • 5,152
11 votes
Accepted

Did any Mockingboard game use the VIA timers or interrupts?

Yes, games like Rescue Raiders and Silent Service used interrupts to queue music and sound effects while other things were happening on the screen. Perhaps the best example of the technique is Skyfox,...
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  • 1,084
11 votes
Accepted

Timing interrupts on MS-DOS

The 8254 system timer calls interrupt 08 at regular intervals (18.2 times per second by default), and the latter calls interrupt 1C which is the one you should hook into. You hook into this in the ...
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  • 95.7k
11 votes
Accepted

Does the Z80 allow interrupts after processing and ignoring a 0xdd prefix?

The 0xDD does not allow an interrupt to happen after it's been fetched, no matter what comes next in the instruction stream. As Wayne Conrad pointed out, otherwise the CPU would have to time travel ...
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  • 34.3k
10 votes
Accepted

How does the Z80 determine which peripheral sent an interrupt?

You might want to consult the chapter for 'Interrupt Response' of the CPU manual (Chapter 8 on p.55 of the 1976 issue) and 'Interrupt Servicing' from the PIO manual (Chapter 6 on p.15 of the 1977 ...
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  • 168k
10 votes

Why do we need to acknowledge the interrupt from VIC-II?

The 6502 is designed to be used in systems with devices that may need to cause an interrupt. The way this is accommodated is by having each device use an open-collector/open-drain output to drive the ...
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  • 27.5k
10 votes

Did the IBM PC use the 8088's NMI line?

On the IBM PCJr, the NMI was used by the keyboard device to signal the CPU. (Source: “The Peter Norton Programmer’s Guide to the IBM PC”, chapter 3, under “Changing Interrupt Vectors” while ...
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  • 2,185
10 votes

Why didn't Wozniak's interrupts work on the Apple I monitor program?

My two cents: I have written a lot of code with interrupts, and failed many times. Interrupts are very difficult to debug because they are asynchronous, you cannot easily enforce the same conditions ...
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  • 5,152
10 votes

How does the BIOS distinguish Interrupt(08h-12h) from INT instructions, vs. actual exceptions inside the CPU?

So I think all the BIOS should abandoned their default IVT at the time INT5 clash bug first happened, and follow Intel's manual to correct their fault immediately, don't use the reserved interrupt ...
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  • 2,213
9 votes

Intel 8080 and Altair 8800. 256 I/O ports, but only 7 free RST (interrupt subroutines) — how does it work?

1 I/O port <> 1 hardware device 1 RST vector <> 1 interrupt from one device You have read the datasheet under false assumptions. There is no such thing as a 1:1 correlation between these ...
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  • 28.3k
9 votes

Did the IBM PC use the 8088's NMI line?

The original IBM 5150 Personal Computer (the IBM PC) connected the Non-Maskable Interrupt to the I/O Check signal, which could be driven by an add-in card, or by the on-board memory. If the systems ...
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  • 226

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