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45 votes

Why can't I invoke the next interrupt service by incrementing the AX register after calling the same interrupt?

When calling the mouse driver interrupt with AX = 0, it returns 0xFFFF in AX if a mouse driver is installed. So if it is installed, the code with INC AX will increment AX back to 0 and then it will ...
Justme's user avatar
  • 33k
33 votes
Accepted

Did any MS-DOS program ever use the System Request interrupt?

TL;DR: One of the great Ideas that never Materialized Contrary to what is often assumed, the key was not added to support some 3270-style emulation1, but to enable a basic multi-application/OS ...
Raffzahn's user avatar
  • 224k
30 votes

What are uses of the byte after BRK instruction on 6502?

On the BBC Micro, the byte after the BRK instruction held the error number, followed by the error message string terminated with 0x0D. CALLing the address of the BRK instruction would cause an error ...
Soruk's user avatar
  • 589
30 votes

Why can't I invoke the next interrupt service by incrementing the AX register after calling the same interrupt?

Calling an interrupt service is more like invoking a system call than it is like writing to a memory-mapped register. That is, when you invoke a software interrupt, there is no guarantee that the ...
user3840170's user avatar
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29 votes
Accepted

Was there any computer since about 1960 without interrupt support?

The Wang 2200 series of minicomputers (Apr 1973 to Jul 1989) was implemented without hardware interrupts. All peripheral interaction was handled via polling. These machines were fitted with a BASIC ...
A. I. Breveleri's user avatar
27 votes

How was the real-time clock implemented in the original IBM PC and PC/XT?

Or was the clock maintained in software, and based off of something like the 18.2 Hz system timer interrupt? This is exactly how time was tracked; you can see the implementation of the timer tick ...
Stephen Kitt's user avatar
26 votes
Accepted

Is there any way to read current Interrupt Mode in Z80 machine code?

The Mirage Microdriver (a snapshot device for the ZX Spectrum) needs to record the current interrupt mode when a snapshot is made. It does this by setting I to 80h and storing the address of an ...
john_e's user avatar
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25 votes

What are uses of the byte after BRK instruction on 6502?

The BRK instruction on the MOS 6502 seems to be one of the more ill-documented features of the processor. [...] Given the lack of documentation about this It is documented quite well and in depth ...
Raffzahn's user avatar
  • 224k
25 votes
Accepted

Can the Z80 Bus Request be used as an NMI?

A hardware interrupt changes the Program Counter (PC) so that a CPU executes instructions from a specific address, where an interrupt service routine (ISR) is located. The Z80 Bus Request /BUSREQ ...
TonyM's user avatar
  • 4,028
23 votes

Was there any computer since about 1960 without interrupt support?

The first microprocessor, the Intel 4004, had no interrupt capability. Its successor, the 8008, had interrupts, but with the shallow call stack and the need to reserve scarce registers to do any sort ...
John Doty's user avatar
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22 votes
Accepted

How does single-stepping on the 8086 interact with internal and external interrupts?

It seems the diagrams are not accurate. I wrote a test program that traces INT1 invocations (and delays execution during INT1 to increase the chance of getting hit by timer interrupts) while executing ...
Michael Karcher's user avatar
22 votes
Accepted

How does the BIOS distinguish Interrupt(08h-12h) from INT instructions, vs. actual exceptions inside the CPU?

As mentioned in the 8086/8088 manuals, even if first 32 interrupt vectors were marked reserved for future use, only the first 5 were actually used by CPU exceptions (Divide Error, Single Step, NMI, ...
Justme's user avatar
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22 votes

Can the Z80 Bus Request be used as an NMI?

The purpose of NMI is to cause the Z80 to execute code located at the NMI handler. The purpose of Bus Request is to prevent the Z80 from executing any code until whatever wanted the bus is done with ...
supercat's user avatar
  • 36.6k
21 votes
Accepted

ZX Spectrum interrupt handling: maskable and NMI

To use the maskable interrupt request /INT on a Spectrum, you need a program that does the following: Implements your Interrupt Service Routine (ISR). This should include a RST 56h instruction to ...
TonyM's user avatar
  • 4,028
21 votes

Was there any computer since about 1960 without interrupt support?

Sharp pocket computers based on the ESR-H SC61860 micro-controller (PC-12xx, 13xx and 14xx) did not have interrupts. No instructions like rti, nothing. Everything was done by polling (it had for ...
Patrick Schlüter's user avatar
20 votes

Did the IBM PC use the 8088's NMI line?

In a 100% compatible PC, NMI is used only to communicate unrecoverable errors — normally a RAM parity failure, but possibly something else, which should reveal itself via one of the system control ...
Tommy's user avatar
  • 37.3k
20 votes

8086 stack segment and avoiding overflow in interrupts

was there a risk that the user program had left the stack pointer close to wrapping round, so that the interrupt itself (which pushes three words onto the stack) or the code running in the interrupt ...
JeremyP's user avatar
  • 11.7k
20 votes

Did any MS-DOS program ever use the System Request interrupt?

The SysRq key is a perfectly normal key on the keyboard. It does not generate a special or unique interrupt by itself. The standard keyboard interrupt of BIOS just does what it does for all keys and ...
Justme's user avatar
  • 33k
19 votes

Was there any computer since about 1960 without interrupt support?

Would embedded systems count? If yes, there were GI's PIC1600 MCUs (http://bitsavers.org/components/gi/PIC/1983_PIC_Series_Microcomputer_Data_Manual.pdf), predecessors of PIC microcontrollers by ...
lvd's user avatar
  • 10.5k
15 votes
Accepted

Why do we need to acknowledge the interrupt from VIC-II?

The VIC keeps the CPU interrupt line activated until the cause for the interrupt is acknowledged, so if you don't tell the VIC which of the interrupts are now handled it won't release the CPU ...
Justme's user avatar
  • 33k
15 votes

What are uses of the byte after BRK instruction on 6502?

The SOS operating system written for the Apple /// used BRK for operating system calls. The byte following the BRK holds the OS function number. Of course, the two bytes after that are also used as ...
fadden's user avatar
  • 9,050
15 votes
Accepted

Why does the BRK instruction set the B flag?

TL;DR: Clearing Two Bits At Once Needs More Logic Remember, the 6502 is all about shedding whatever could be removed from the 6800. Never spend on hardware if it could be done in software. In this ...
Raffzahn's user avatar
  • 224k
14 votes
Accepted

Intel 8080 and Altair 8800. 256 I/O ports, but only 7 free RST (interrupt subroutines) — how does it work?

I have looked this video - Altair 8800 - Interrupt Acknowledge Cycle and have few questions (I have read wikipedia Intel 8080 article, Altair 8800 Operator's manual, Charles Petzold "Code" ...
Raffzahn's user avatar
  • 224k
14 votes
Accepted

Did the VIC-20 support raster scanline tricks like the Commodore 64?

You're correct; the only interrupts on offer in a Vic-20 are those from a VIA — they're plain old 6522s in the Vic-20, not 6526s. The original VIC chip exposes the current scan line via a couple of ...
Tommy's user avatar
  • 37.3k
13 votes

Why do we need to acknowledge the interrupt from VIC-II?

The 6502 is designed to be used in systems with devices that may need to cause an interrupt. The way this is accommodated is by having each device use an open-collector/open-drain output to drive the ...
supercat's user avatar
  • 36.6k
13 votes
Accepted

What stops an IO device from driving the databus longer than the CPU expects?

An I/O device will monitor IORQ, M1, and the address bus to determine whether to respond to an I/O cycle. As soon as the CPU negates IORQ the I/O device will stop responding. This ensures the CPU is ...
raisin-wrangler's user avatar
13 votes

8086 stack segment and avoiding overflow in interrupts

We need to distinguish here between the "stack," which is a data structure in the imagination of the programmer, and what the CPU does with stack registers and the memory pointed to by them, which is ...
cjs's user avatar
  • 26.6k

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