The Commodore 64 advertises 38911 bytes free for BASIC upon startup. It's a 64kb machine. Non-BASIC programs could use the full 64kb rather than the ~38kb. Therefore using more memory than is available to BASIC was routine.
The difference was primarily that BASIC and the rest of the kernel don't need to be present, so if you're not using them then you can ...
Answers for the Apple II:
(Please have a look at this answer to understand the memory layout, and where the areas used by BASIC are placed).
1) Were there any games/software that used memory beyond what was advertised as available to BASIC on the machine?
Assuming that "advertised as available to BASIC" means "between $801 and DOS", then yes, machine ...
Nowadays there is such thing as IOMMU, when every device that needs to do DMA with system memory, receives essentially virtual address and the host converts that address with the help of IOMMU device, before actually going into physical memory.
Therefore, we can say that PCI-express have this feature as well, though the address is irrelevant to the bus, it ...
DEC PDP-11 and VAX systems using the Q-Bus had a 'Q-bus map' to map from the bus address space into the physical memory space. This is basically an MMU for devices. On an I/O request from a program, the driver and OS would allocate and initialize map registers, and pass the appropriate bus-virtual address to the device.
It's possible for a contiguous bus-...
The XMS specification is still accurate: functions 0x10 and 0x11 provide access to UMBs. However, the specification doesn’t decide where those functions are implemented.
On its own, HIMEM.SYS does indeed only provide access to memory above 1MiB, i.e. the HMA (so it also controls the A20 line) and extended memory (which it makes available as XMS). If you ...
Is it possible to run code directly from ROM [...] by jumping into this region of the address space?
Game Code can of course be run from ROM. And most games will do so.
If so, why did games generally copy code into RAM before running it?
Generally sounds a bit too much here. In fact, as game cartridges range from 4 MiB to 64 MiB (and more), the existing ...
No, it cannot be disabled, although it can be ignored by the rest of the hardware. Just OR /MREQ with /RFSH negated. Decoding /MREQ along with /RD or /WR is also fine, and you won't need /RFSH. A 74HCT138 3 to 8 decoder can do the job.
No, there is no Z80 pin compatible, software compatible processor that allows the user to disable the refresh cycle, but ...
A Z80 will always do a refresh cycle during T3/T4 of an M1 cycle. Disabling is not possible.
During a refresh cycle the /RFSH signal will be active for both cycles, signaling a valid refresh address, while /MREQ is active during the second half of T3 and the first half of T4. Neither /RD nor /WR will be active during T3/T4. Thus a refresh cycle is never a ...
I can't speak as to derivatives, but the plain Z80 does not permit you to disable refresh. One refresh cycle will be attached to every operation byte fetched from the instruction stream (with the exception of offsets in IX/IY+d mode).
That said, the value placed on the bus during refresh is I:R — the I register is used to populate the top 8 bits, and is ...
Here is a simple way for you to get your program working and continue working on it (for now).
Save your existing DHARMA INITIATIVE LOGO program to disk as a file called MAIN.
Now type this program and save it as START:
10 POKE 103,1:POKE 104,64:POKE 16384,0
20 PRINT CHR$(4);"RUN MAIN"
When you run START it will set up and run the ...
Here is a picture (to scale) of how memory is being used in
units of "pages" (256 bytes) on the Apple 2.
000000001111111111111111 2222222222222222 3 ... ... 9
89ABCDEF0123456789ABCDEF 0123456789ABCDEF 0 ... ... 6
|Basic:::::::::::::::::::|::: HGR | |