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1

It may be theoretically possible, but impractical. The N64 cartridge interface time-multiplexes data and address on the same 16 pins. You send the first 16 bits of the address, then send the last 16 bits of the address, then receive the 16-bit result. The whole process takes around 1 µs. That translates to 1 MHz. The N64 CPU runs at 93 MHz. So this means ...


7

For the origin of fixed size pages, and independently mapped pages, you need to go back at least as far as the Manchester Atlas machine of 1962. A historical perspective of both the Atlas ad the earlier Mark I can be found here. In that article it mentions that Atlas memory was divided into fixed size pages of 512 words each. The idea of separating virtual ...


1

There's also the TI-99/4A way of accessing more ROM and RAM than there is address space. The TMS-9900 has a 15 bit address bus and could therefore only address 32768 16 bit words. When one looks at the memory map of the TI-99/4A one can see that the console can address (theoretically) up to 32KiB+256 RAM, 16KiB VRAM, 8KiB + 2x8KiB ROM, 24KiB + 16x40KiB GROM ...


0

I wrote a rather large program for a DEC PDP 11-70 at the end of the 1970s, and once it broke through the 64k barrier, I had to go to Overlays. This meant manually partitioning the program into pages, so that any one page was self consistent. Very tedious and error-prone. I don't recall if the entire 64k had to be swapped for a different one each time, or ...


7

Another solution worth mentioning — although I doubt it was used by the systems you mention, and it merely allows addressing twice as much as 64K of memory — is "Split I&D", as rather famously used on later models of the PDP-11. A program could have 64K of memory for program text, and 64K of memory for data, for a total of 128K. The processor ...


15

There are a number of approaches that can allow a CPU with a 16-bit address bus to address more than 64kBytes of memory: Bank Switching - explained in another answer,basicaly switching for example 8- or 16-kBytes blocks back and forth into the addressable range, so in effect exchanging the blocks with ones that are currently paged in. Some computers could ...


30

I don't know details of the Sharp PC-G830 specifically but the technique used to address more than 64K with a 16-bit address bus is called "bank switching". This involves setting up some portions of memory to be switchable via an I/O port line and then the application program organizes things in memory such that different sections can be switched ...


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