Hot answers tagged

97

Look at the development: ROM = read-only memory = can only be read when on the board, programmed in the chip factory. PROM = programmable read-only memory = can be programmed with a special programmer, but read-only when on the board. EPROM = erasable programmable read-only memory = can be repeatedly programmed with a special programmer, after erasing it ...


53

The difference between Applesoft BASIC and the other Microsoft 6502 BASIC derivatives can be explained by the fact that Applesoft BASIC was not the first BASIC for the Apple II; the first was Apple II Integer BASIC, in turn derived from Apple I BASIC, which had been independently created by The Woz. Integer BASIC supported only 16-Bit signed integers as a ...


47

When did computers stop checking memory on boot? Never. I remember my old 8088 used to do this (640K OK) but can't remember seeing anything like this since. Does this still happen and it's just not visible? Exactly. And it has been simplified and speed up as well. But more important, it's usually hidden under some manufacturer boot logo or whatsoever ...


44

The Z80 has an address space of 64KB. That means it can perform 8 bit reads or writes to 65,536 distinct locations as specified by the 16 address pins on the CPU. As far as the Z80 is concerned that's all it knows about. Now it's up to the system designer to decide which of those locations lead to RAM, which lead to ROM, which might lead to memory mapped ...


44

It might be important to know that the 3101 was neither a genuine Intel development, nor intended as a RAM - at least not in a way we see RAM today. After all, what use could there be in 1970 for a RAM 30 times faster than average core but quite small, just a few words ... hmm ... what data store can be small but should be fast? Exactly: Registers! The 3101 ...


43

As noted in some initial comments (but I feel fine answering, as I had the exact same ideas when I read the question), this is a general progression of technology but there are two very specific factors for RAM: Core Memory -> Integrated Circuits While many different, very expensive, systems were used in the first computers, including mercury delay lines, ...


42

You just made a file for each chapter, like sensible people do with current word processing! It is very unusual to write something lengthy in a single document.


42

To print an area of 7.5 by 10 inches at 300 DPI requires 844K if it's kept as a single bitmapped image. Does it? Maybe. Then again one cold think of many simple ways (like RLL) to compress a rendered image fast and decompress it at a speed quite capable to keep up with the print-'head'. Obviously they were doing something clever to minimize the hardware ...


42

Most likely different acrchitecture comes from idea how memory cards will/should be used and what are the available interfaces to access them. The PS memory cards do have flash memory, but the bus to the memory card is serial SPI compatible bus. The used memory chip is AT29LV010 which has 128 kilobytes of flash with parallel interface. Therefore to connect ...


35

The method depends on whether you have the address space or not, regardless of the RAM limitation. If you already have a 32-bit address space, but simply not much RAM, then the answer is virtual memory.  Virtual memory is generally processor supported: the processor traps accesses to memory that isn't present, and allows the operating system to perform ...


35

In the early 1990's CDC sold a line of Cyber 180 mainframes. These machines were descendants of the CDC 6600 and supported that machine's 60-bit word size and 6-bit characters. Notably, one of the innovations of the 180 over the 170 is that the 180 added support for 64-bit words and 8-bit characters, and could run software written for both modes ...


34

TL;DR; Dropfiles are somewhat related to virtualization as they allow to remove a process complete from execution and restart it later. Agent_L describes it quite head on as 'per-process hibernation'. A whole process will be taken off a machine with the option to restart it later on the same or another machine under the same or another user. Dropfiles are ...


32

Both the ZX80 and the ZX81 had a variable-size display file (DFILE). They didn't store the complete screen contents, but rather only the characters per line up to a terminating newline. This collapsed DFILE is activated when the ZX detects less than 3 1/4kB of memory on startup. A collapsed DFILE can thus be as small as 24+1 bytes (initial HALT, 24 NEWLINEs,...


31

The basic answer is “yes”, assuming you want to be a good DOS citizen, however in many cases you don’t need to worry about it because the operating system takes care of it for you. If you’re talking about conventional memory, allocating it explicitly isn’t necessary: EXE files’ headers specify the minimum and maximum amount of memory the program needs, and ...


31

Why are they doing that? The most important reason is that IBM introduced that check as part of the BIOS startup code, so everyone copied it to be compatible. The PC did differ from many other machines of the same era in that it did a thorough test of all components installed at power up to make sure the configuration was operable. Something carried over ...


31

EEPROM can't be "written to." It can be programmed. Programming is different. When there's EEPROM in a CPU's physical address space, ordinary write cycles will not affect it. Something out of the ordinary has to happen in order to change the EEPROM's contents. The oldest PROMs and EEPROMs had to be physically removed from the system and programmed ...


30

I don't know details of the Sharp PC-G830 specifically but the technique used to address more than 64K with a 16-bit address bus is called "bank switching". This involves setting up some portions of memory to be switchable via an I/O port line and then the application program organizes things in memory such that different sections can be switched ...


29

Caveat: I can only tell about mainframes. Minis might have used different protection and handling schemes (and for sure smaller memory sizes). My detailed knowledge is based on memory up to the mid-1970s. Further I was working for a manufacturer of compatible mainframes. We switched already for complete semiconductor memory at a time when IBM introduced new ...


29

There were 64 data bits and 8 check bits. It seems to me by the nature of parity, it should suffice to have one bit of overhead per word, rather than eight. [...] What you refer to here is a simple single bit parity. Basically counting the number of ones (even parity) or zeros (odd). Such a mechanism can only detect an odd number of bit flips (1 or 3 or 5 ...


29

PIC: 7 bit address space The Microchip PIC family of CPUs specifically the 10, 12 and 16 series have 7 bits of address space. While 7 bits is not exactly 8 bits this shows that there are commercial CPUs still on sale and still widely used that have less than 8 bit address space (they are used for example for power management on some Macs and are the most ...


28

If you look at the datasheet of a typical DRAM chip of this era, say the Mostek 4116, it indeed has a cycle time of 375ns, so you can't access it at more than 2.6 MHz. But don't confuse the clock rate of a microprocessor with the bus timing. Looking at figure 4-1 of the 68000 datasheet, a simple byte read or write bus cycle takes 4 CPU cycles (8 bus states; ...


28

Unisys continued shipping 36-bit systems far more recently than 1997. The last new 36-bit Dorado - the 800 series -- was released in 2011, and superseded - per my recollection - by the Xeon-based, emulation-oriented 8300 series in 2015. (Xeon emulating the Dorado ISA had made up a progressively larger part of the Dorado product line since the late 1990s, but ...


28

ROM and RAM bank switching is controlled by a memory bank controller present on the cartridge. By writing values to areas of read-only memory, a game or program is able to specify which ROM banks to access when read operations are performed. The simplest cartridges simply contained ROM and had only had 32 KBytes of space. It is mapped directly to $0000-$...


27

A single bad DRAM, probably — in machines of that vintage each DRAM holds only a single bit at each address; you use eight in parallel to serve an 8-bit bus. And the Spectrum uses physically separate chips to serve its first 16kb and the other 32kb. So a single chip holds the value of bit 2 for every address at or above 32768. No matter which address you ...


26

In addition to Raffzahn's usual excellent answer, a few important things to note: PCL still exists. You can (I do...) still write software that sends simple PCL commands to a printer to select fonts, print text, etc. Sending an entire page, of text, as a bitmap to a printer is the way GDI printers work - and is a Very Bad Thing. The original HP LaserJet ...


26

Did anyone ever put that much memory in an Altair, IMSAI or other 8080/Z80 S-100 bus machine? Has been done a lot of times. Remember, S100 has been used all the way thru the 1980s into the 1990s. RAM sizes did pass the basic 64 Ki already before 1980 and went way beyond 2 MiB soon after. Boards were available by all major S100 supporters, including Cromemco,...


26

I'm mostly concerned about RAM. Why was it so expensive? It wasn't - at least not once integrated circuit RAM became available in the 1970s. Compared to other chips, RAM was cheaper both per transistor and per package. Some example prices:- From an advert in Byte magazine issue #1 (Sept 1975) 8080 CPU: (4,500 transistors) $149.95 = $33 per thousand ...


25

No. In your hypothetical 16 bit machine with 64kiB of RAM, you could simply implement two 32kiB banks with using sixteen 16kib chips each. This obviously doubles the required number of chips and board space required, which may not be cost-effective against using just next higher-density chips and getting twice as much memory again for free. At least one ...


25

Right off the top, SIMM type modules have higher pin densities and are mechanically far more robust than that ZIP chip package. It'd be relatively easy to bend pins getting these things in an out (possibly worse than DIPs even), and protecting the pins in transport looks even harder than doing so with DIP chips. Remember that many retailers are unlikely to ...


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