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36

The method depends on whether you have the address space or not, regardless of the RAM limitation. If you already have a 32-bit address space, but simply not much RAM, then the answer is virtual memory.  Virtual memory is generally processor supported: the processor traps accesses to memory that isn't present, and allows the operating system to perform ...


33

In the early 1990's CDC sold a line of Cyber 180 mainframes. These machines were descendants of the CDC 6600 and supported that machine's 60-bit word size and 6-bit characters. Notably, one of the innovations of the 180 over the 170 is that the 180 added support for 64-bit words and 8-bit characters, and could run software written for both modes ...


29

Both the ZX80 and the ZX81 had a variable-size display file (DFILE). They didn't store the complete screen contents, but rather only the characters per line up to a terminating newline. This collapsed DFILE is activated when the ZX detects less than 3 1/4kB of memory on startup. A collapsed DFILE can thus be as small as 24+1 bytes (initial HALT, 24 NEWLINEs,...


28

Caveat: I can only tell about mainframes. Minis might have used different protection and handling schemes (and for sure smaller memory sizes). My detailed knowledge is based on memory up to the mid-1970s. Further I was working for a manufacturer of compatible mainframes. We switched already for complete semiconductor memory at a time when IBM introduced new ...


28

Unisys continued shipping 36-bit systems far more recently than 1997. The last new 36-bit Dorado - the 800 series -- was released in 2011, and superseded - per my recollection - by the Xeon-based, emulation-oriented 8300 series in 2015. (Xeon emulating the Dorado ISA had made up a progressively larger part of the Dorado product line since the late 1990s, but ...


27

There were 64 data bits and 8 check bits. It seems to me by the nature of parity, it should suffice to have one bit of overhead per word, rather than eight. [...] What you refer to here is a simple single bit parity. Basically counting the number of ones (even parity) or zeros (odd). Such a mechanism can only detect an odd number of bit flips (1 or ...


26

The basic answer is “yes”, assuming you want to be a good DOS citizen, however in many cases you don’t need to worry about it because the operating system takes care of it for you. If you’re talking about conventional memory, allocating it explicitly isn’t necessary: EXE files’ headers specify the minimum and maximum amount of memory the program needs, and ...


25

No. In your hypothetical 16 bit machine with 64kiB of RAM, you could simply implement two 32kiB banks with using sixteen 16kib chips each. This obviously doubles the required number of chips and board space required, which may not be cost-effective against using just next higher-density chips and getting twice as much memory again for free. At least one ...


25

A single bad DRAM, probably — in machines of that vintage each DRAM holds only a single bit at each address; you use eight in parallel to serve an 8-bit bus. And the Spectrum uses physically separate chips to serve its first 16kb and the other 32kb. So a single chip holds the value of bit 2 for every address at or above 32768. No matter which address you ...


23

If you look at the datasheet of a typical DRAM chip of this era, say the Mostek 4116, it indeed has a cycle time of 375ns, so you can't access it at more than 2.6 MHz. But don't confuse the clock rate of a microprocessor with the bus timing. Looking at figure 4-1 of the 68000 datasheet, a simple byte read or write bus cycle take 8 CPU cycles, and the simple ...


23

Why are they doing that? The most important reason is that IBM introduced that check as part of the BIOS startup code, so everyone copied it to be compatible. The PC did differ from many other machines of the same era in that it did a thorough test of all components installed at power up to make sure the configuration was operable. Something carried over ...


22

Many low cost computers of the era used SRAM instead of DRAM, including the ZX80, TRS-80 Model 100 and VIC-20. There were a few advantages. Much simpler to interface to, which is particularly important for hobby machines where the complexity of DRAM makes the PCB or hand wiring significantly more complex. The Galaksija used a single sided PCB that already ...


21

The Amiga 3000 shipped with 2 MB and is expandable with stock parts up to 1170 MB (4x 256 MB RAM card, 128 MB on CPU card, 18 MB on motherboard) - that's 585x. In theory, it could go up to a full 4 GB (2048x) but no hardware exists to do that. For on-motherboard expansion, the Power Macintosh 9500 shipped with 32 MB and is expandable up to 1536 MB - that's ...


21

It all depends on the computer to be modified and it's RAM system. Let's for now focus on the pure RAM expansion issue and drop the part about bank switching, as this is complete machine dependent and a generalized answer, as requested, will be impossible. Even so there are still many hurdles to overcome. One after the other: RAM Type Some machines, like ...


21

It was an issue on all machines — wait states resolve any situation in which the part a processor needs a response from isn't yet ready to respond — but only in the commoditised world of the PC was it a variable and therefore worth putting in the advertising. In the Atari ST, wait states are inserted if the 68000 tries to access RAM during a video slot (two ...


21

Space Invaders uses a simple display format where bytes are read from memory in order via an address counter, and shifted out via a shift register. Timing is controlled by discrete hardware. The video hardware has priority over the CPU. When it needs to read a byte it asserts the 8080's READY signal, giving it exclusive access to the memory bus. This can be ...


19

Such a question is a bit difficult, or rather impossible, to answer. While it is true that most mainstream computers today use units of 8 bits for bytes and and, at least Latin, characters, there always have been and still are exceptions. So, the answer to your "the last one" question probably is "there is none". There are a number of widespread embedded ...


19

ROM and RAM bank switching is controlled by a memory bank controller present on the cartridge. By writing values to areas of read-only memory, a game or program is able to specify which ROM banks to access when read operations are performed. The simplest cartridges simply contained ROM and had only had 32 KBytes of space. It is mapped directly to $0000-$...


17

On the C64, even hobbyist assemblers like HypraAss supported symbols, so no, I don't think anyone used hardcoded addresses if there was a way to use a symbol instead. But you had to be careful how you arrange your data in memory. For example, on the C64, it wasn't possible to put video or sprite data into RAM locations 0x1000..0x1fff and 0x9000..0x9fff ...


17

The Windows 98 memory manager only supports a maximum of 1GB. This amount of memory was considered beyond huge for the time, and by the time people commonly had that much or more memory, Microsoft expected people to be using either newer versions of Windows 9x, or Windows NT. From Raymond Chen's blog The Old New Thing: Windows 98 bumped the limit to 1GB ...


17

I might have found a stable way to limit Windows 98 to use only 1Gb of RAM with HimemX: Install Windows 98 with 1Gb of RAM or less; Download himemxfrom https://sourceforge.net/projects/himemx/; Extract himemx.zip and copy himemx.exe to C:\Windows\ under Windows 98; Open the Run dialog box (Windows + R), type sysedit and press Enter; Open the file C:\CONFIG....


17

For the sake of offering a contrary answer: there is no memory protection and there are no access levels, so there will be no segmentation fault or other hardware interrupt if you access memory that is there and which you have not asked for ownership of. If you are an MS-DOS program then you are driving the computer. Various of the interrupts will be set up ...


17

Even for single board computers (SBCs), capacitive loading of the DRAMs chips or SIMMs and timing delays thru any needed (re)buffering could limit DRAM capacity before board size (without extra chips or ASICs for distributed memory control and fan-in, as is done for the scale-out of big IBM Power 9 mainframe systems. Projects with memory limited workloads ...


17

Does fast page mode apply to ROM? No. Why should they? You're missing one step to start with in your chain of thoughts. (Fast) Page Mode is an improvement to the address multiplex protocol dynamic RAM uses. As such it isn't a general improvement, but a relative one, reducing the overhead the address multiplexing implies. Address multiplexing was ...


16

There are several reasons for the low performance of virtual memory. The implementation had a significant effect. It keeps ALL of the contents of memory in the VM Storage file, plus however much extra you've set it to, so all memory writes are also to disk also, even if not all reads are. Source Program design also affected this. Many memory-hungry ...


16

Yes, the IBM 1360 used it. The wikipedia page suggests that it could store 0.5 terabits of information. https://en.wikipedia.org/wiki/IBM_1360 Fascinating design.


16

Right off the top, SIMM type modules have higher pin densities and are mechanically far more robust than that ZIP chip package. It'd be relatively easy to bend pins getting these things in an out (possibly worse than DIPs even), and protecting the pins in transport looks even harder than doing so with DIP chips. Remember that many retailers are unlikely to ...


15

Naïve programming was often limited by memory speed even for the fastest mainframes available in the 1980s. For example on an IBM S/370 system, the maximum amount of memory available to a single user program could be limited to about 9MB out of an address space of 16MB (the other 7 being reserved for the operating system!) compared with hundreds of MB of ...


15

Your Mac II “HMMU” chip implements the address functionality shown in this image, from Guide to the Macintosh Family Hardware, 2nd edition: The chip has two modes of operation. In 24-bit mode, the addresses are mapped as shown and the top 8 bits of the address bus are ignored. In 32-bit mode the address is buffered unchanged. Early versions of the Mac ...


15

Click on the application icon, select "Get info" from the "File" menu, and adjust the memory allocation in the window that pops up.


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