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7

The highest capacity DRAM to ever be used for the Commodore 64 motherboard was 256Kbit. By the early 1990s, 1Mbit DRAM was commonplace, but used in a 256Kbx4 would require the C64 to have 256KB of main memory. It was almost certainly cheaper to continue to source the 256Kbit RAMs than to either upgrade the C64 to support 256KB of RAM near its end-of-life, or ...


3

Per Apple IIc ROM Versions: Memory Expansion IIc (ROM version 3) ... The new motherboard added a 34-pin socket for plugging in memory cards irectly, which allowed for the addressing of up to 1 megabyte of memory using Slinky-type memory cards. ... So you're correct that the expansion cards are Slinky-style. Following up on that, I also found a ...


2

The official way to access either RAM is due the so called 'Protocol Converter'. A call convention, introduced with the IIc disk port. The IIc disk port was the first enabled to hanabled to handle multiple peripherals over one bus. Protocol Converter interface is much like Prodos' MLI and allows to access block or character devices in an abstract way. At ...


7

My firm designed microcomputer boards in the late 1970s to early 1980s, and we often had discussions about whether a particular design was going to use static or dynamic RAM. When you say "static RAM, because it's quite a bit easier to get to work", you also need to remember that the refresh circuits cost design time, chips, and board space. (No surface-...


5

The Vic20 was not the last consumer product to use static ram on the main system board. In the mid 90's a Socket 3 (486 class) motherboard was created by Ocean Technology octek.com - defunct. The HIPPO-DCA2 motherboard which required at least one 4MB 72-pin SIMM of something called DynamiCache RAM in the first 2 slots. DynamiCache was a built from high ...


10

I did find some prices in BYTE: November 1975, page 91 2107 4Kx1 Dynamic: $19.95 (0.49 cents/byte) 2111 256x4 Static: -- not listed 1101 256x1 Static: $2.25 (0.89 cents/byte) April 1976, page 89 2107 4Kx1 Dynamic: $19.95 (0.49 cents/byte) 2111 256x4 Static: $7.95 (0.77 cents/byte) 1101 256x1 Static: $2.25 (0.89 cents/byte) Byte ...


6

The 8088 (and Z80 and 1802 and many other older CPU designs, including minicomputers and mainframes) required multiple clock cycles to run each machine code instruction. This was due to being implemented by internal microcoding, limited shared resources, or non-pipelined state machines, due to much lower transistor counts than todays processors. As long ...


8

The 65816 does the same thing; the most-significant 8 address bits are multiplexed onto the data bus pins during the Phi1 half of each clock cycle, and it reverts to being a data bus during the Phi2 half. The WDC datasheet illustrates a simple external logic circuit which latches the address bits and isolates the data bus pins from a device responding ...


11

In general: memory needs stable address for a while. So the real access time is "time to address available + memory access time". If you use the CPU with a full address bus (Z80, 6502, ...), it can expose the whole address in one cycle, wait only "memory access time" interval, and you can read. On the other hand, let's take the 8085 CPU with a multiplexed ...


6

The XMS api doesn't support as much memory as you have installed - it uses 16 bit registers to specify memory sizes in units of KiB, so the maximum amount of memory it can report to a program that queries the available memory is just under 64MiB. Windows 98 generally expects applications to use DPMI to request memory rather than XMS, which was only included ...


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