44
votes
What was the last x86 processor that didn't have a microcode layer?
The original 8086 was microcoded; x86 has never been hard-wired.
The P6 microarchitecture, first seen in the Pentium Pro, was the first Intel design to buffer a RISC-esque translation of the x86 ...
- 33.8k
42
votes
Accepted
How was microcode implemented in retro processors?
How was microcode implemented in retro processors such as the Z80 or 8080?
None of these chips (likewise 6800 and 6502) use microcode the same way as it's used today. The decoding isn't as strictly ...
- 195k
29
votes
What was the last x86 processor that didn't have a microcode layer?
All x86 CPUs have always used microcode.
Since the i486, the simplest and most used instructions are directly decoded without passing through the microcode ROM, which would have incurred additional ...
- 2,099
24
votes
What was the last x86 processor that didn't have a microcode layer?
In the earlier days of microprocessors instructions were hard-wired
Yes, but ...
Even early microprocessors, like the Z80, 6800 and 6500, live in a gray area between pure random logic and a school ...
- 195k
22
votes
Was the IBM 5100 ever used for codebreaking?
The 5100 had programmable microcode which could be used to implement crypto-specific opcodes1,2,3. Then there's the whole John Titor4,5 thing...
1 Such as population count
2 I'm unaware of anyone ...
- 9,200
20
votes
Accepted
Why are PDP-7-style microprogrammed instructions out of vogue?
[...] had these opr instructions, which contained many bitfields which encoded something like "subinstructions"[...]
What you describe is basically a (V)LIW instruction format - at least that's what ...
- 195k
17
votes
Why are PDP-7-style microprogrammed instructions out of vogue?
The PDP-7 was a one address machine. All instructions occupied 18 bits. The operations that manipulated the accumulator didn't reference memory, and therefore didn't need an address. But the ...
- 4,913
16
votes
Accepted
6502 branch offset calculation
Quick shot, without looking it up in Visual 6502 (which would be the authorative option):
Sign extend the branch offset (replicate MSB of offset), that will tell you the ALU input for the PC high ...
- 24k
15
votes
How was microcode implemented in retro processors?
There are retro computers that have readable and writeable microcode, but not the ones you mentioned in your question. And the ability to change the microcode was extremely rare in the kinds of CPUs ...
- 36.1k
12
votes
Were the VAX eXtended Function Control (XFC) instructions ever used commercially?
I was VAX Architect for six years in the late '80s, and at least during my tenure, Raytheon was the only company licensed to design VAX-compatible processors, for producing MIL-SPEC machines. They did ...
- 331
11
votes
Accepted
What is the MOS 6502 doing on each cycle of an instruction?
In general most instructions on the 6500 series take as many cycles as there are memory accesses, with a lower limit of two. This means no instruction will execute in less than two cycles (*1).
The ...
- 195k
10
votes
How was microcode implemented in retro processors?
I was in college when the 8086 and 6502 came out, and took a digital electronics course at that time in which I designed a simple CPU using microprogramming techniques. From studying the 8086 and ...
- 101
9
votes
What is the MOS 6502 doing on each cycle of an instruction?
Assuming you’re asking: what can the 6502 be seen to be doing by an external observer, then the data sheet has a full breakdown of bus activity per cycle per addressing mode; that was long ago ...
- 33.8k
8
votes
How was microcode implemented in retro processors?
The canonical examples for early microcoded CISC microprocessors are probably the Intel 8086 and the Motorola 68000. Of the two, the 8086 is the simpler (29K transistors vs. 70K in the 68000). But ...
- 59.1k
8
votes
Was the IBM 5100 ever used for codebreaking?
I think the original argument (both in the John Titor hoax and in Steins;Gate) goes like this:
The IBM 5100 can emulate the IBM mainframe ISA (that's true, and that's how the APL running on the IBM ...
- 24k
8
votes
Accepted
Why did later CPUs use microcode instead of PLA's?
But it's not a ROM; [...] it's actually a PLA
Then again, a ROM and a PLA is essentially the same technology. What differs here is not only the decoding, but that in case of the 6502 only the ...
- 195k
6
votes
Why did later CPUs use microcode instead of PLA's?
Two interconnected moments in history with the popularity of microcode in microprocessors need to be distinguished:
Firstly, the ratio of price, volume and speed of various types of memory;
Secondly, ...
- 2,081
6
votes
How do multi-byte instructions work?
One example is the 6502. It fetches an opcode, and then while storing the opcode in internal memory, fetches some argument which may be 1 or 2 bytes. This is not hard to achieve, it is not a Herculean ...
- 36.1k
5
votes
How was microcode implemented in retro processors?
There is at least one documented example of one hardware design being used as two different processors via customer specific microcode: Some very small, late implementations of IBMs S/370 (eg those ...
- 5,540
5
votes
What is the relation between external clock and internal states in the 68000?
With the help of the PDF I found in @dirkt's link, I'm able to answer my question.
Yes, there are internal T signal states, each of them running in the active phase of two non overlapping 8 MHz ...
- 947
4
votes
Why did later CPUs use microcode instead of PLA's?
For those interested in the hands-on use of microcode, including how to implement a CPU (1802 - which was NOT microcoded, but a FSM control unit) and a display controller, I developed a compiler that ...
- 41
4
votes
Were the VAX eXtended Function Control (XFC) instructions ever used commercially?
I microcoded up all the UNIX string functions, just to see if anything could be gained; and also a dynamic programming solution of an esoteric parsing problem. The former would need huge strings to ...
- 41
3
votes
Were the VAX eXtended Function Control (XFC) instructions ever used commercially?
Note: Strictly speaking, my answer below doesn't answer the question asked, because what the OP was referring to was the instructions reserved for customer use, rather than those it reserved for DEC, ...
- 390
3
votes
Why did later CPUs use microcode instead of PLA's?
As I understand it, later chips like the 8086 and 68000 use microcode
of the conventional ROM variety.
This is simply not true. 68000 CPU used a combination of PLA-driven decoding and ROM-driven ...
- 9,672
3
votes
Accepted
How do multi-byte instructions work?
[Preface: This question is independent of word size or CPU, and in no way RC.SE specific, but a basic lesson about processor design, so it might be more appropriate to ask in SO, CS or EE]
It's as ...
- 195k
3
votes
Was the IBM 5100 ever used for codebreaking?
I have an IBM 5100. There were some versions with APL-only and some versions with BASIC-only, while also yet another version that did have "the switch" as mentioned to toggle between either ...
- 129
3
votes
6502 branch offset calculation
AFAIR it's Carry XOR Sign (of the offset).
If this yields true, it's increment when Carry, otherwise decrement.
- 195k
3
votes
Why are PDP-7-style microprogrammed instructions out of vogue?
Another good example of this basic architecture is the HP2100 series, which had a series of bit-field instructions that performed things like test-and-branch. They could combine up to eight ...
- 17.8k
2
votes
How do multi-byte instructions work?
"You have to fetch another byte while storing the first, which seems frankly impossible to me."
In simple words CPU is storing first byte (opcode) in internal register(s). Most (or maybe all) CPUs ...
- 257
2
votes
What is the MOS 6502 doing on each cycle of an instruction?
The length of the ADC Immediate is 2. One for the opcode $69 and one for the immediate. At the very least, this requires two bus cycles to fetch. On a "simple" processor, an instruction can'...
- 467
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