In some cases undocumented instructions may be useful as shortcuts to accomplish tasks that are "difficult" to achieve with the official instructions.
Going with the Z80, it is common practice amongst developers to make use of the undocumented instructions that allow to access index registers IX and IY as pairs of 8-bit registers (so IXh, IXl, IYh, IYl). ...
More “serious and modern” CPUs than the 6502, Z80 and PDP-8 have undocumented instructions too, and they don’t necessarily cause the CPU to stop.
The Intel x86 line has quite a few instructions which were initially undocumented; one very famous instruction, which can not be replaced by documented instructions, is LOADALL, which has been discussed here ...
In many cases, undocumented opcodes were not deliberately created, but are merely the result of designers including the minimal circuitry necessary to create a specified set of opcodes. On the 6502, for example, consider how one might go about creating the instructions LDA, LDY, and LDX. Rather than handling the three instructions separately, it would make ...
There were different models of the PDP-8, but most models (say, PDP-8/E) consisted of a number of rackmounted boxes, one of which you could call the CPU (or, compared to a modern PC, maybe the motherboard is a better comparison).
Here and here are some good pictures.
The unit shown with the front panel in the typical orange/yellow colors containing the ...
The PDP-8 was a 12-bit computer with a deliberately simple instruction set.
That's part of your answer right there: the 6502 was in many ways more complex than the PDP-8: the 6502 has 56 machine instructions, but the PDP-8 has only 24.¹
The base configuration of the original PDP-8 simply offered less power in its half rack of space than the 6502 does in ...
Without detailed documentation on the PDP-8 design process, we cannot say for sure. I suspect that while they may have briefly considered it, it was never a serious prospect.
The PDP-8 is just the PDP-5 redesigned electronically. The PDP-5 was introduced in 1963 as an even-more-reduced version of a computer compared to the PDP-1 and PDP-4. The PDP-1/4 did ...
The photographs I found seem to be evenly divided between showing it as a compact unit that looks maybe one foot high
It is most likely, based on sales numbers, that you're describing a PDP-8/e or PDP-8/I. What you're seeing is just the front panel. The PDP-8/e front panel is 10.5 inches high (PDF!), or 6 rack units. The PDP-8/I front panel is a bit shorter,...
Technically, the three common methods for storing text in a PDP-8 memory were:
two 6-bit chars per word, using the 64 glyph TTY character set
padded to 8-bit bytes, packed three bytes per two words
one char per word, accepting the overhead of four or five unused bits per char
With a few rare exceptions, programs handle text for two reasons:
If you compare the octal opcodes for the skip instructions,
7500 SMA = 111 101 000 000
7440 SZA = 111 100 100 000
7420 SNL = 111 100 010 000
7510 SPA = 111 101 001 000
7450 SNA = 111 100 101 000
7430 SZL = 111 100 011 000
you see that in each group, there are three conditions that ...
The original (straight) 8 is a fancy shaped box of about 2 ft wide, 3 ft height and 2 ft deep.
Later models where mostly standard 19" rackmount boxes, roughly 2x1x3 ft3 until the last ones made that like 'half height' of ~6 inches.
So yes, different sizes correspond to different models over time.
And yes again, the racks usually shown are whole machines,...
In spirit it's both, thus eventually neither.
Features of the 6800 can be put in line with many CPUs of that time - from PDP-8 and -11 all the way to TI's 990 or even IBM's /360 - but none will put it decisively into being based on either. In fact, many of the arguments that can be used to put the 6800 into PDP-8/-11 heritage can as well be applied to the ...
Most sources say it was based on PDP-11.
Here are citations from the book "Early Home Computers", summarizing the similarities and the differences:
Unlike the PDP-11, 6502 and 8080, the 6800 was big-endian, as was the IBM 360 (...)
Unlike the PDP-11 and 6502, but like the 8080, the 6800 used borrow carry (...)
Unlike the 8080 and especially the ...
The PDP-8 processor was implemented in diode-transistor logic, whereas most early microprocessors were implemented in some variety of MOS logic,
most commonly NMOS. This accounts for some of the discrepancy you note: a typical gate in MOS logic would use 3 transistors (the wikipedia article shows a resister and two transistors, but on an actual integrated ...
The classic PDP-8 made extensive use of what were called DCD gates. These diode-capacitor-diode gates performed the logical AND function between two inputs, one a pulse and one a level signal. So, for example, each flip-flop in the PDP-8 accumulator was made with two transistors plus an array of DCD gates on the set and reset inputs that served to ...
The PiDP-8 project has a wonderful Field Guide to PDP-8 Assemblers, which reviews most (all?) of the PDP-8 assemblers available.
SMAL, SABR and RALF have linkable objects that may fit your needs. A partial C cross-compiler for the PDP-8 exists, and uses SMAL.
I'd like to add a few words on conditional branching.
This is quite different from the conditional branching on the PDP-11
and the 6502 computers.
It simply doesn't fit into the PDP/8 instruction scheme, the 12 bits aren't enough for that. A conditional branch needs two aspects in one instruction:
defining the branch target (the jump address)
When I used the PDP-8, 7-bit ascii was in use. Strings would start on an word boundary, and be packed 1.5 8-bit bytes per word, and the last nibble might be unused.
You'd use a subroutine to output them somewhere (e.g. teletype), and that subroutine would unpack them for sending as individual 8-bit characters. The subroutine would have code for each case: ...
In practice, a typical minicomputer would spend a great deal of its time dealing with text one way or another.
Not really. PDPs where mainly used to automate machinery and related number crunching (only small numbers and little pebbles from today's view). Text wasn't among high priority.
In those days, the market didn't demand the ability to use ...
Why did the PDP-8 not distinguish between data and address widths like the microprocessors?
You have your question the wrong way around. Up until the advent of microprocessors, it was quite normal for addresses and data to be the same size. When they weren't the same size, the address was normally smaller than the data. So the PDP-11 has 16 bit addresses ...
Not sure that this really counts as using undocumented op-codes, but might be sufficiently related to be of interest...
On the 8086, there are often two ways of encoding the same instruction (especially for register-register operations). At least one shareware package (the A86/A386 assembler written by Eric Isaacson) uses this facility to "watermark" the ...
Doug Jones' PDP-8 Programmer's Reference Manual is very helpful here.
There's pretty much just one way to do multi-word precision add and subtract. Memory addressing complicates things so let's just consider adding two fixed 3 word little-endian numbers at address A and B with result into C.
CLA CLL ; clear accumulator and link (carry-ish) bit.
I'm going to say no.
The PDP-8 was chiefly designed for compatibility with the PDP-5, and this machine also had no hardware stack.
There is not enough room in the instruction space to add push and pop instructions either.
Before the PDP-8/e, two other models of the PDP-8 had their electronics all fitting entirely beind the front panel. The PDP-8/S, which arrived shortly after the original PDP-8, was in this category; however, because it used a serial arithmetic unit, it was slow and of limited popularity. The PDP-8/L, a computer using the same technology as the PDP-8/I, but ...
There is a section in the DEC FAQ that describes the differences between the PDP-5 and PDP-8 instruction set:
Compatability: The core of the PDP-8 instruction set is present, but
memory location zero is the program counter, and interrupts are
handled differently. The Group 1 OPR rotate instructions cannot
be combined with IAC or CMA; ...
A bit of googling finds this Japanese article, and DeepL does a really impressive English translation, which I am mostly just going to quote, with a bit of corrections.
1960: prototype of fully automatic SAPTON typesetting machine announced
1962: SAPTON-F numeric-only typesetting machine delivered to Japanse Defence Agency
1965: SAPTON-N ...
Wikipedia seems to be wrong here. From the Intersil Manual:
DEVICE INTERRUPT GRANT TIMING
The current content of the Program Counter, PC, is deposited in location 0000 of the memory and the program fetches the instruction from location 0001...
That clearly implies to me there is no address stored at 0001.
Beyond that, there's not much of a ...
I wonder if there isn't a minor mistake in the CPU being discussed in one of those.
It's very easy to see the 68K as nearly a direct descendant of the PDP-11. The 68K has separate data and address registers, but programming it is mostly quite similar to programming a PDP-11.
I'd say the 6800 is (much) closer to a PDP-8. If memory serves, the 6800 has two ...
The PDP-5 also offered expansion up to 32K words, similar to the PDP-8. This was the "Memory Extension Control Type 154" as seen on the second-last page of this PDP-5 brochure:
MEMORY EXTENSION CONTROL
Allows expansion of the PDP-5 memory from 4096
to 32,768 words in increments of 4096 words. Can
be attached to any PDP-5 without requiring ...
The Intersil 6100 manual on bitsavers clearly says
Instruction fetch from 0001 of mem
in figure 11 (page 19). It doesn't say "data fetch, and instruction fetch from address just read".
So it is indeed a JMS, and the Wikipedia wording is misleading (well, it's Wikipedia).
I also would have been very surprised if they had changed this in the ...