Here is a reference to BIOS beep codes. For American Megatrends, look under AMI. 3 beeps means the low 64K failed - a very basic test - which probably means the RAM isn't working at all.
You should first check whether the RAM is compatible with your machine. At that time, there was a lot of variation - 5V vs 3.3V, 30-pin vs 72-pin, EDO vs FPM, not to ...
Well, it's a 'trick' to simplify the editor as well as the BASIC editor. After Reset (or NEW) three bytes of Zero are placed at the beginning of the basic RAM. They make it look to the basic interpreter as this looks like the tokenisation of a single, empty BASIC line. Consisting of
One byte 00 as line end marker and
Two bytes 00 as pointer to the next ...
Commodore had an overstock of 2114 Chips at that time (*1), so Jack Tramiel, then president of Commodore, ordered the project (*2) to use them.
Yeah, but why 5 KiB? Why not just 4KiB?
Due the nature of the 6502, RAM is needed at address 0, while the way the 6560 VIC (*3) was addressed called for RAM at $1xxx. So with a continous memory of 4 ...
How two 260ns RAM accesses could fit in 500ns?
By using a 250ns (*1) tRC cycle?
And yes, strictly that's out of spec. Still chances are very good that each and every chips will make it, as the timing range selected is rather conservative to start with. Even more so as this value is usually defined by the makers as being guarantied over the the whole ...
Most of the reference material for the Apple II that I have seen refers to the 4116 RAM chip which held 16x1 kbit.
Jup, at the time the Apple II really took off, 4116 chips had already dropped to less than twice the price of 4104, making any use of 4104 impractical. Not many were delivered using 4104, and while some users may have had 4104, they all soon ...
"The console" (or other computer) is made up of various parts, including the processor, the memory, and peripherals such as video display controllers, I/O chips to read from a keyboard or joystick, disk controllers, and so on.
When using "programmed I/O," the CPU reads data from or writes data to a peripheral and, if the data need to be stored in memory, ...
My firm designed microcomputer boards in the late 1970s to early 1980s, and we often had discussions about whether a particular design was going to use static or dynamic RAM.
When you say "static RAM, because it's quite a bit easier to get to work", you also need to remember that the refresh circuits cost design time, chips, and board space. (No surface-...
In the case of Intel, their initial manufacturing lines were set up for 16 and 18-pin ceramic DIP packages. Thus, their first memory and processor chips were limited to 16 or 18 pin packages:
3101 Schottky TTL SRAM
3301 Schottky TTL ROM
1101 MOSFET SRAM
1103 MOSFET DRAM
Intel determined the Busicom design was too ...
I don't know whether it's still the case, but at least in the early days, it was common for RAM chips to be one bit wide, so e.g. an 8-bit computer would install them in groups of eight.
Not really. It depends on the way the Family designers envisioned a certain system. And what the use case in terms of memory needed was. Early RAM chips where all static ...
The following information comes mainly from pages 70-72 of the Apple
II Reference Manual, 1979 edition.
The Apple II had three rows of eight sockets for DRAM: rows C through
E from front to back. Each row could accept either 4116 16Kbit×1 or
4104 4Kbit×1 DRAM chips.
Each row also had next to it a DIP socket for a 14-pin "memory
configuration block" that ...
The product ID on the sticker (819475G) identifies the machine as an IBM ThinkCentre A50p, model 8194.
A search for the 8194 model on a few RAM sellers' websites gives us the following information:
The IBM ThinkCentre A50p 8194 Computer takes the PC2700 DDR SDRAM DIMMs.
Memory Speed options: PC2700 DDR333 184Pin SDRAM DIMM
These are industry ...
The VIC-20 has 1K of low memory ram containing room for the zeropage, the stack and kernal and basic working areas. ($000-$03FF)
4K of main RAM ($1000-$1FFF)
so the main ram is a multiple of 4.
see memory map
The XMS api doesn't support as much memory as you have installed - it uses 16 bit registers to specify memory sizes in units of KiB, so the maximum amount of memory it can report to a program that queries the available memory is just under 64MiB. Windows 98 generally expects applications to use DPMI to request memory rather than XMS, which was only included ...
If by "unavailable to store BASIC program text," the general answer
would be "all sorts of stuff." A typical memory map for an early
Apple system would be along the lines of the following:
$0000 - $00FF (0 - 255): Zero Page (system variables)
$0100 - $01FF (256 - 511): 6502 Processor Stack
$0200 - $02FF (512 - 767): GETLN Line Input Buffer
$0300 - $03CF (...
Let's take for example an MSX computer with 64K RAM. That's what you get on boot:
Where does this 28815 come from?
To start with, a MSX is a Z80 based machine. The Z80 has an addressing space of 64K. The MSX standard divides these 64K in four 16K pages that can be independently switched to any internal or external memory slot.
When booting in BASIC mode (...
The Vic20 was not the last consumer product to use static ram on the main system board.
In the mid 90's a Socket 3 (486 class) motherboard was created by Ocean Technology octek.com - defunct. The HIPPO-DCA2 motherboard which required at least one 4MB 72-pin SIMM of something called DynamiCache RAM in the first 2 slots.
DynamiCache was a built from high ...
You are probably referring to the status register. This is a hardware register in the CPU, and is not stored in RAM.
Generally speaking, the HuC6280 is similar to a 6502-family CPU. You may want to acquaint yourself better with those parts; familiarity with them will make the HuC6280 easier to understand.
There were several cards, in the mid 1980s, based on use of 64 KiB. Except that it was usually not to use full 64 Kib, but to get RAM at the right location some (game) program wanted it.
For example this page shows three different boards of that time frame.
The main issue with RAM in the VIC20 is less the amount of RAM, than that its use swaps around, ...
In such cases, the problem is almost always in one of three places:
One of the memory modules.
The motherboard itself.
A plug-in device.
To help with the testing, you should start be removing all non-essential devices form the system (CDROM, Network, HDD, other I/O). Just leave the keyboard, screen and floppy. Then re-run your tests. If it works, the ...
I think it should go something like this. (I don't know where I can find a ROM image that'll load into an online emulator to check.)
You can check which ROMS are in which bank.
ADFS should be in bank D (i.e. 13).
That should now show that ADFS is unplugged.
Load your image into one of the sideways RAM banks 4, 5, 6, or 7 (...
asserting /GAME on the cartridge port of the C64 leaves three blocks of the C64 address space "unmapped"
No, at least not alone. /EXROM also needs to be high. Otherwise standard RAM/ROM configuration prevails.
Is it safe for the cartridge to respond to read and write requests to these areas?
I assume here that the cartridge would have its own ...
(Too long for a comment)
DMA is not in any way console or retro computing related. It is actual technology and today used more than ever. Each of your disk reads and writes, each transfer to your graphics or network card will usually involve DMA.
DMA describes the access of components, other than the CPU, on (a CPU's) memory. In general it's the ability to ...
The speed rating of asynchronous DRAM devices is usually (as in this case), the "RAS access time" or tRAC. This is the minimum guaranteed time for data to appear at the output after /RAS is provided with the row address, noting that this process also requires /CAS to be provided with the column address at some intermediate time. The speed at which you can ...
When using a non-multiplexed address bus, an N-by-4 RAM chip will need two fewer address bits than a 4N-by-1 chip, so even though it has three more data bits, the net gain for moving to an N-by-four organization is only one pin. Expanding to an 8-wide arrangement could save one more address pin, but add four more data pins.
When using multiplexed addresses,...
The begin of the basic area is set in the addresses 43/44, the default value is 01 and 08, which means a start address of $0801 = 2049. The end of the basic area is in addresses 55/56, default values are 160 and 0, meaning $A000 = 40960. 40960 minus 2049 is 38911, the value that is also reported at the startup screen.
The byte before the basic area must ...
You mention there are 4 2Mb modules. If I remember correctly, many 486 era boards would let you populate in banks of 2. If your board supports it, you can try removing 2 of the memory modules and running the system with only 2 installed. If the problem persists, it is likely to be one of the two remaining modules. If the problem goes away, then it is ...
To add to user Raffzahn's answer - this
It generates RAS/CAS signalling for each and every access, no matter what address is used (*1).
would imply that - talking about a system without any cartridges inserted - when a Program writes to the I/O area, for example some VIC or CIA hardware register, RAM memory in the $Dxxx area gets clobbered. Unless I'm ...
In general: there were some system variables, system stack, display memory, buffers, etc. On some systems, there was a RAM area "under" the ROM (it means on the same address, but not accessible in a straight way) - for example, the Atari XL.
Actually, many of the early microcomputer systems were designed in violation of worst case timing specifications, perhaps under the assumption that if the prototypes worked (due to statistical variation in the chips and environment (temperature, voltage, EM noise, etc.)), so would a high enough percentage of the production line. High temperature burn-in was ...