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I have never seen any 16 bit I/O cards. There wasn't much business sense to build such, as it would have quite limited possible sales. (CPU)-Boards according to the IEEE standard for 16 bit access (*1) had to be able to turn any 16 bit request into two consecutive cycles to enable seamless interaction with 8 bit boards. Making a card requiring single cycle ...


How does this work from the endian-ness perspective? Endianness is for most parts a software issue. Hardware, especially memory is either agnostic to the way a word ist stored, or doesn't have any idea about units wider than a byte at all(*1). Basically all I/O on S100 is 8 bit wide - after all, continuing the use of existing peripherals was a main point of ...


A long time ago I worked on an Alpha Microsystems computer which was S-100 based little-endian, and while I was there we upgraded to a 68000-based system that had been wired (I don't know the details) to behave as if it was a little-endian system. So I can't give you details, but it is possible.


Buses like S-100 are "endianness-agnostic". They do not care about data and its order, they just transport desired content as CPU (or "master") asks. Endianness is "the CPU thing".


As Wikipedia says (S-100 bus): "(Author) then looked for an inexpensive source of connectors, and he came across a supply of military surplus 100-pin edge connectors. The 100-pin bus was created by an anonymous draftsman, who selected the connector from a parts catalog and arbitrarily assigned signal names to groups of connector pins." So the ...

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