There are many issues here.
As it is already said in comments, decoupling capacitor is a must!
555 (non-CMOS) timer output is very much like the output of TTL ICs, however Z80 requires a firm logic one. When feeding Z80 clock pin from a TTL output, you should use pullup resistor of 200..500 Ohm.
NMOS Z80 uses dynamic logic, that means it has some minimal ...
One language that was popular on early 8-bit micros, including those that used the 6502 CPU, was Forth. Forth is exceptionally good for this use case, and superior to a C compiler, because Forth can make more efficient use of the 6502's hardware stack. Forth lacks any sophisticated methods of dealing with parameters. Everything is passed through the Forth ...
The Z80 has an address space of 64KB. That means it can perform 8 bit reads or writes to 65,536 distinct locations as specified by the 16 address pins on the CPU. As far as the Z80 is concerned that's all it knows about.
Now it's up to the system designer to decide which of those locations lead to RAM, which lead to ROM, which might lead to memory mapped ...
... a scaled-down, cost-reduced, clone of the Intel 8080.
The Z80 had a massively extended instruction set, featured more addressing modes and had more registers than the 8080.
It also had a built-in DRAM refreshing logic.
... and it was more expensive than the 8080!
This is the opposite of "cost-reduced".
It only used a 4-bit ALU. I assume this would ...
The standard way would be adding it to HL. After clearing HL that is.
This is not only already available with the 8080,
DAD SP ; Same opcode (39h), same workings
thus preferable, but as well very handy when setting up a pointer to parameters on stack as, of course, any other constant than 0 can be used and added.
C can be greatly improved as a language for the 6502 and Z80, as well as micros like the PIC and 8051, if one abandons the notion that implementations must provide for recursive subroutine calls, and adds qualifiers for things in zero page or pointers that are limited to accessing such things, and (for the Z80) adds qualifiers to identify objects that are ...
I know that the Z80 and the 6502 are very different, but I was wondering if there are any languages on a higher level than assembly which can generate compact and efficient 8-bit machine code by design, and how this was achieved?
Well, a prime candidate would be Ada.
It was a specific design goal for Ada to produce good code for tiny and 'odd' ...
If there are two consecutive bytes of RAM one can write at a known address, one could store the byte values E1h, E9h [POP HL / JP (HL)] at that address and then CALL it to place the address following the call into HL. Alternatively, if those byte values appear at some known address in ROM one could simply call that address likewise. There isn't any way to ...
For Spectrum BASIC, the routine for Small Integers (16 bit) can be seen on page 179 of the Complete ZX Spectrum ROM Disassembly, where it loops over the sixteen bits of one operand, shifting them into the carry bit, adding successively doubling values to the result value each time the test passes, and testing for overflow if the result doesn't fit in a small ...
The Z80 is "binary compatible" with the 8080. It adds a bunch of new instructions, but places them all in unused (well, undocumented) opcodes.
yes .. err, no, they placed them on redundant opcodes.
For example the whole 00-xxx-000 group were NOP instructions for the 8080, while Zilog only left 00h as NOP, while the others became jumps (and EX). Likewise ...
A Z-80 program will be 15% smaller than an 8080 program.
To come up with this guess I took a reasonably tight Z-80 program, the TRS-80 4K Level 1 BASIC ROM and estimated the cost of replacing the Z-80 specific instructions with 8080 code. I'll get back to the limits of this methodology later but for now let me plow on with this example.
Of the 4096 ...
Multiplying (and dividing) by powers of 2 has always been trivial and fast even for 8-bit processors like Z80 or 6502, with shifting instructions (commonly arithmetic shift left aka ASL).
But those processors didn't have a MUL instruction so when it came to non-power of 2 multiplication, it always involved shifting, testing bit and adding shifted result if ...
I'd just like to expand on a couple of points in lvd's excellent answer.
You might get by with just using a jumper wire to short the reset pin to ground for a brief moment after you've powered up the CPU. It's worked for me, but if you're having problems it's best to build a proper reset circuit.
Many CPUs have a minimum length for the reset ...
Possibly a simple logic trick. The slow path in addition is carry propagation (not the individual half-adders). You can thus often double the clock rate by pipelining the carry. If you pipeline the carry, then you can reuse the bit adders at the beginning of the chain, and put them at the end. Depending on the ratio between pipeline registers, reuse ...
Your observation about the 64K address space is correct, your 32K RAM and 32K EEPROM will be able to fill that address space to 100%. In Z80 designs, the ROM/PROM/EPROM/EEPROM is usually placed starting at 0x0000 since when you do a RESET, the Z80 starts executing at 0x0000 and you usually want to have your program start there.
Of course there are many ...
Simply because these registers are not exchanged, but renamed (*1).
All EX DE,HL does is toggling a flip-flop which decides which is HL and which is DE.
Much the same way the exchange for alternate AF (EX AF,AF') or alternate register (EXX)set is done. It's as well the reason why all of them can be done in just 4 cycles — toggling either flip-flop does not ...
Just use Z84C40 SIO chip. It's a part of standard Z80 family chips and has two channels. I used it for PS/2 keyboard and USB connection to my breadboard Z80 computer running at 2.4576 MHz. Z84C40 can divide system clock by factor of 16, 32 or 64 thus I run my UART-USB bridge at 38,400 baud without use of 4-bit counter as system clock divider. Luckily PS/2 ...
You can write Zilog 80 programs and games (as I do) on the Commodore 128. I exploit Z88DK, which does the magic of booting the C128 in Zilog 80 mode.
The Zilog80 at 2mhz effective speed is about as fast as a MOS6502/8502@1mhz in many situations.
In some situations that depend on a bigger hardware stack, the slow Zilog80@2mhz can beat the MOS6502/8502@1mhz.
The Z80 can access all hardware I/O addresses in the C128, with the natural exception of the built-in I/O port (a 6520-style PIA) of the 8502 CPU. That means that, if I remember correctly, the only hardware that is not easily usable from the Z80 is
the CAPS LOCK key of the US version (ASCII/DIN in German models, I don't know what it is called ...
Preface, this is not really how RC.SE works. If you're looking for someone to design your hardware or write you a program, there are many sites out there where you can put a reward for someone taking the job. RC.SE is about answering your questions, as detailed as they are asked
I am working on designing a Z80 computer and I would like to use a PS/2 ...
It's 64 KiB total in any combination imaginable.
Or more general:
The Z80 features
16 address lines (A15..A0),
sufficient to address 64 KiB (via D7..D0),
which can be used to access one of two address spaces
default memory (with next to all instructions, indicated by /MREQ) or
I/O locations (with IN and OUT instructions, indicated by /IORQ).
Those two mnemonics opcodes are known to have the same timing / same inner mechanisms of mapping into HL.
It is obviously a bug in documentation from the link you give us. Those two pages you mention (86 and 87) were certainly edited based in the HL instruction, and someone forgot to edit that value to reflect the IY timing.
Also, do not focus much in ...
Why did the Z80 with 4-bit ALU out-perform the fully 8-bit Intel 8080?
Did it? I guess this depends on what 'performance' meant here.
If it's about instructions per clock, then No. They are, for all practical purposes, identical.
If it's about reaching higher clock speed, then Yes.
If it's about an increased instruction set, then as well Yes.
If it's about ...
The 0xDD does not allow an interrupt to happen after it's been fetched, no matter what comes next in the instruction stream.
As Wayne Conrad pointed out, otherwise the CPU would have to time travel into the future to find out what instruction is going to get fetched.
About the R register on a real Z80:
But is the 8th bit actually used?
Yes, it's freely available and won't be touched by any instruction except loading R
Is its behaviour undocumented or can it only be altered by loading it with a value from the accumulator
It's well documented and can be used like assumed. When loaded all 8 bits from A are stored in R - ...
The .z80 format comes from the Z80 emulator by Gerton Lunter. He released some documentation about the file formats used in it, and regarding offsets 11 and 12, this is what the manual says:
The old .Z80 snapshot format (for version 1.45 and below) looks like
Offset Length Description
0 1 A register
It sounds as if your ideal device would be something like a Raspberry Pi, but based on a Z80 rather than an ARM core. The Pi provides a video generator, USB ports for peripherals, GPIO points, and so on. However, the reason Raspberry Pis are so cheap is that they're based on System-on-Chip products that are made in large volumes for other applications.